Transient Analysis
In this Topic ShowHide
What Causes Non-convergence?
There are a number of reasons for convergence failure in transient analysis but most have their root in one of the following:
-
The circuit does not have a real and finite solution
-
The circuit contains discontinuities
-
There is insufficient precision available to meet the required tolerance
1. is a circuit problem. A trivial example of 1. is a PN junction biased by a large voltage. Without any series resistance, the voltage does not need to be very high for the current in the device to exceed the range of the machine. However, this can also be a result of more subtle problems. A linear circuit which is unstable can suffer unbounded growth which will ultimately overflow. This will show as a convergence failure.
An example of 2. is a bistable circuit where the device capacitances are not modelled. The action of switching state would theoretically occur in zero time, a situation the simulator cannot be guaranteed to handle.
2. above is the cause of many convergence problems. Some of these are caused by poor model design. However, this can also be the result of regenerative feedback if there is no time limiting elements. For example a bistable circuit with no capacitance will switch state in zero time. Such discontinuous action will often lead to convergence failure.
3. is common but difficult to diagnose. In some cases it is possible for the effect of a change in the least significant digits in the calculations to get magnified to such an extent that they exceed the required tolerance.
Fixes for Transient Non-convergence
-
Type this at the command line:
This will list nodes and devices that are causing the convergence problem. If any nodes are on the top level of your schematic, these will be highlighted. This should give a clue to the cause of the problem.
-
As with DC operating point, check your circuit. In particular, check that you are not doing anything which might cause numerical difficulties such as forward biasing a zero resistance PN junction with a large zero source impedance voltage source.
-
Do anything that will prevent small time steps being needed. Gross non-linearities, regenerative loops and high gain loops all require small time-steps if not well damped. It may be that you have left out damping components to simplify the circuit and speed the simulation.
-
Avoid over-idealising. A common misconception is that simplifying a circuit by removing reactive components such as capacitors will speed up a simulation and make it easier to converge. Capacitors have a number of stabilising effects on simulation and are usually beneficial.
-
Avoid using unrealistically large capacitors or inductors and unrealistically small resistors if at all possible. You should especially avoid such components if non-grounded.
-
If you have some large capacitors in your circuit, try adding a small amount of ESR using the built-in capacitor ESR parameter rather than a separate resistor.
-
If all else fails you can try relaxing some of the tolerances. If your circuit does not have any small (sub-$\mu$A) currents then set ABSTOL to 1e-9 or 1e-6. You can also increase VNTOL (default 1e-6) to say 1e-3 if your circuit only has large voltages. Increasing RELTOL is the very last thing you should try. In our experience, increasing RELTOL beyond its default value (0.001) is rarely a reliable solution and can make matters worse.
-
Contact technical support. We don't officially offer a convergence fixing service and reserve the right to decline help. However, we are always interested in non-converging circuits and usually we will look at your circuit to see if we can identify the problem.
Copyright © SIMetrix Technologies Ltd. 2015