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» DVM Test Report: Efficiency and Loop Characterization|Vin Maximum|40% Load
| Test Details | |
| Schematic | 8.2_LLCClosed Loop.sxsch |
| Test | Efficiency and Loop Characterization|Vin Maximum|40% Load |
| Date / Time | 2/7/2015 10:39:24 AM |
| Report Directory | measure_loop_param\Efficiencyand Loop Characterization\Vin Maximum\40% Load |
| Log File | report.txt |
| Screenshot | schematic.png |
| Status | PASS |
| Simulator | simplis |
| Deck | input.deck |
| Init | input.deck.init |
| Measured Scalar Values | |
| Efficiency | 95.9731% |
| Frequency(CLK) | 96.175542kHertz |
| Power(LOAD) | 48.3978 |
| Power(SRC) | 50.4285 |
| eta_max | 95.9731% |
| gain_crossover_freq | 4.08126k |
| gain_margin | 27.691 |
| gmargin_max | 27.691 |
| gxover_max | 4.08126k |
| iload_max | 2.00852 |
| min_phase | 78.0679 |
| phase_crossover_freq | 34.9413k |
| min_phase_freq | 4.08126k |
| phase_margin | 77.9294 |
| pmargin_max | 77.9294 |
| sw_freq_max | 96.175542kHertz |
| ICout | AVG 4.79465u MIN -2.00686 MAX 1.19316 RMS 1.00579 |
| IDQ1 | AVG 126.098m MIN -563.622m MAX 667.721m RMS 326.133m |
| IDQ2 | AVG 126.058m MIN -563.397m MAX 667.805m RMS 326.108m |
| ILOAD | AVG 2.00852 MIN 2.00686 MAX 2.00953 RMS 2.00852 |
| ISRC | AVG 126.098m MIN -563.622m MAX 667.721m RMS 326.133m |
| Im | AVG -76.8148u MIN -485.747m MAX 485.593m RMS 280.623m |
| Ip | AVG 116.812u MIN -426.74m MAX 427.027m RMS 299.556m |
| Ir | AVG 39.9975u MIN -667.801m MAX 667.717m RMS 462.702m |
| Is1 | AVG 1.0047 MIN -5.06378u MAX 3.2027 RMS 1.58925 |
| Is2 | AVG 1.00383 MIN -5.0638u MAX 3.20054 RMS 1.58801 |
| VLOAD | AVG 24.0962 MIN 24.0763 MAX 24.1082 RMS 24.0962 |
| VSRC | AVG 399.987 MIN 399.933 MAX 400.056 RMS 399.987 |
| VSW | AVG 199.988 MIN -722.52m MAX 400.777 RMS 282.325 |
| Vs | AVG -40.1706m MIN -24.9955 MAX 24.8676 RMS 24.862 |
| Measured Spec Values | |
| Max_VLOAD | PASS: Max. Output1 Voltage (24.1082) is less than or equal to Max. Output1 Voltage Spec (25.2) |
| Min_VLOAD | PASS: Min. Output1 Voltage (24.0763) is greater than or equal to Min. Output1 Voltage Spec (22.8) |
| min_gain_margin | PASS: Gain Margin (27.691) is greater than Min. Gain Margin (12) |
| min_phase_margin | PASS: Phase Margin (77.9294) is greater than Min. Phase Margin (35) |
 Bode Plot
GAIN
PHASE
|
|
| SXGPH File | simplis_ac22_1419.sxgph |
 LOAD
VLOAD
ILOAD
|
|
| SXGPH File | simplis_pop22_1385.sxgph |
 SRC
VSRC
ISRC
|
|
| SXGPH File | simplis_pop22_1375.sxgph |
 Primary
IDQ1
IDQ2
Im
Ip
Ir
VSW
|
|
| SXGPH File | simplis_pop22_1366.sxgph |
 Secondary
CLK
ICout
Is1
Is2
Vs
|
|
| SXGPH File | simplis_pop22_1380.sxgph |
| Other SXGPH Files | |
| DVM Bode Plot Input#log#ac | simplis_ac22_1426.sxgph |
| default#1408#pop | simplis_pop22_1408.sxgph |
| Modulator#pop | simplis_pop22_1413.sxgph |
