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» DVM Test Report: Efficiency and Loop Characterization|Vin Minimum|30% Load
| Test Details | |
| Schematic | 8.2_LLCClosed Loop.sxsch |
| Test | Efficiency and Loop Characterization|Vin Minimum|30% Load |
| Date / Time | 2/7/2015 10:42:01 AM |
| Report Directory | measure_loop_param\Efficiencyand Loop Characterization\Vin Minimum\30% Load |
| Log File | report.txt |
| Screenshot | schematic.png |
| Status | PASS |
| Simulator | simplis |
| Deck | input.deck |
| Init | input.deck.init |
| Measured Scalar Values | |
| Efficiency | 95.7875% |
| Frequency(CLK) | 79.861421kHertz |
| Power(LOAD) | 36.301 |
| Power(SRC) | 37.8974 |
| eta_min | 95.7875% |
| gain_crossover_freq | 4.85813k |
| gain_margin | 26.3027 |
| gmargin_min | 26.3027 |
| gxover_min | 4.85813k |
| iload_min | 1.50648 |
| min_phase | 44.6237 |
| phase_crossover_freq | 31.7591k |
| min_phase_freq | 4.85813k |
| phase_margin | 44.3653 |
| pmargin_min | 44.3653 |
| sw_freq_min | 79.861421kHertz |
| ICout | AVG 4.81411u MIN -1.50555 MAX 1.35427 RMS 1.02501 |
| IDQ1 | AVG 105.299m MIN -568.963m MAX 630.114m RMS 321.887m |
| IDQ2 | AVG 105.263m MIN -570.938m MAX 630.195m RMS 321.875m |
| ILOAD | AVG 1.50648 MIN 1.50553 MAX 1.50734 RMS 1.50648 |
| ISRC | AVG 105.299m MIN -568.963m MAX 630.114m RMS 321.887m |
| Im | AVG -120.704u MIN -572.55m MAX 572.297m RMS 337.012m |
| Ip | AVG 156.702u MIN -381.118m MAX 381.55m RMS 243m |
| Ir | AVG 35.9979u MIN -630.192m MAX 630.111m RMS 456.299m |
| Is1 | AVG 753.83m MIN -5.06177u MAX 2.86162 RMS 1.28957 |
| Is2 | AVG 752.654m MIN -5.0618u MAX 2.85838 RMS 1.28783 |
| VLOAD | AVG 24.0966 MIN 24.0816 MAX 24.1101 RMS 24.0966 |
| VSRC | AVG 359.989 MIN 359.937 MAX 360.057 RMS 359.989 |
| VSW | AVG 179.99 MIN -727.517m MAX 360.783 RMS 254.158 |
| Vs | AVG -30.1295m MIN -24.9741 MAX 24.8599 RMS 24.4411 |
| Measured Spec Values | |
| Max_VLOAD | PASS: Max. Output1 Voltage (24.1101) is less than or equal to Max. Output1 Voltage Spec (25.2) |
| Min_VLOAD | PASS: Min. Output1 Voltage (24.0816) is greater than or equal to Min. Output1 Voltage Spec (22.8) |
| min_gain_margin | PASS: Gain Margin (26.3027) is greater than Min. Gain Margin (12) |
| min_phase_margin | PASS: Phase Margin (44.3653) is greater than Min. Phase Margin (35) |
 Bode Plot
GAIN
PHASE
|
|
| SXGPH File | simplis_ac34_2199.sxgph |
 LOAD
VLOAD
ILOAD
|
|
| SXGPH File | simplis_pop34_2165.sxgph |
 SRC
VSRC
ISRC
|
|
| SXGPH File | simplis_pop34_2155.sxgph |
 Primary
IDQ1
IDQ2
Im
Ip
Ir
VSW
|
|
| SXGPH File | simplis_pop34_2146.sxgph |
 Secondary
CLK
ICout
Is1
Is2
Vs
|
|
| SXGPH File | simplis_pop34_2160.sxgph |
| Other SXGPH Files | |
| default#2188#pop | simplis_pop34_2188.sxgph |
| Modulator#pop | simplis_pop34_2193.sxgph |
| DVM Bode Plot Input#log#ac | simplis_ac34_2206.sxgph |
