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» DVM Test Report: Efficiency and Loop Characterization|Vin Nominal|90% Load
| Test Details | |
| Schematic | 8.2_LLCClosed Loop.sxsch |
| Test | Efficiency and Loop Characterization|Vin Nominal|90% Load |
| Date / Time | 2/7/2015 10:37:25 AM |
| Report Directory | measure_loop_param\Efficiencyand Loop Characterization\Vin Nominal\90% Load |
| Log File | report.txt |
| Screenshot | schematic.png |
| Status | PASS |
| Simulator | simplis |
| Deck | input.deck |
| Init | input.deck.init |
| Measured Scalar Values | |
| Efficiency | 95.3386% |
| Frequency(CLK) | 85.744653kHertz |
| Power(LOAD) | 108.802 |
| Power(SRC) | 114.122 |
| eta_nom | 95.3386% |
| gain_crossover_freq | 4.861k |
| gain_margin | 17.4492 |
| gmargin_nom | 17.4492 |
| gxover_nom | 4.861k |
| iload_nom | 4.51692 |
| min_phase | 42.1321 |
| phase_crossover_freq | 16.1675k |
| min_phase_freq | 4.861k |
| phase_margin | 41.7743 |
| pmargin_nom | 41.7743 |
| sw_freq_nom | 85.744653kHertz |
| ICout | AVG 4.7943u MIN -4.50848 MAX 2.68368 RMS 2.23913 |
| IDQ1 | AVG 300.399m MIN -538.315m MAX 1.08473 RMS 544.323m |
| IDQ2 | AVG 300.361m MIN -536.092m MAX 1.0847 RMS 544.287m |
| ILOAD | AVG 4.51692 MIN 4.50847 MAX 4.52198 RMS 4.51692 |
| ISRC | AVG 300.399m MIN -538.315m MAX 1.08473 RMS 544.323m |
| Im | AVG -117.767u MIN -546.838m MAX 546.601m RMS 316.285m |
| Ip | AVG 155.761u MIN -960.322m MAX 960.756m RMS 672.445m |
| Ir | AVG 37.994u MIN -1.0847 MAX 1.08472 RMS 770.466m |
| Is1 | AVG 2.25905 MIN -5.0875u MAX 7.20567 RMS 3.56706 |
| Is2 | AVG 2.25788 MIN -5.08752u MAX 7.20241 RMS 3.56529 |
| VLOAD | AVG 24.0877 MIN 24.0428 MAX 24.1146 RMS 24.0877 |
| VSRC | AVG 379.97 MIN 379.892 MAX 380.054 RMS 379.97 |
| VSW | AVG 189.97 MIN -723.946m MAX 380.776 RMS 268.003 |
| Vs | AVG -90.3196m MIN -25.2191 MAX 24.9311 RMS 24.9522 |
| Measured Spec Values | |
| Max_VLOAD | PASS: Max. Output1 Voltage (24.1146) is less than or equal to Max. Output1 Voltage Spec (25.2) |
| Min_VLOAD | PASS: Min. Output1 Voltage (24.0428) is greater than or equal to Min. Output1 Voltage Spec (22.8) |
| min_gain_margin | PASS: Gain Margin (17.4492) is greater than Min. Gain Margin (12) |
| min_phase_margin | PASS: Phase Margin (41.7743) is greater than Min. Phase Margin (35) |
 Bode Plot
GAIN
PHASE
|
|
| SXGPH File | simplis_ac13_834.sxgph |
 LOAD
ILOAD
VLOAD
|
|
| SXGPH File | simplis_pop13_800.sxgph |
 SRC
VSRC
ISRC
|
|
| SXGPH File | simplis_pop13_790.sxgph |
 Primary
IDQ1
IDQ2
Im
Ip
Ir
VSW
|
|
| SXGPH File | simplis_pop13_781.sxgph |
 Secondary
CLK
ICout
Is1
Is2
Vs
|
|
| SXGPH File | simplis_pop13_795.sxgph |
| Other SXGPH Files | |
| default#823#pop | simplis_pop13_823.sxgph |
| Modulator#pop | simplis_pop13_828.sxgph |
| DVM Bode Plot Input#log#ac | simplis_ac13_841.sxgph |
