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» DVM Test Report: VOUT=0.6V|Bode Plot|Vin Maximum|100% Load
| Test Details | |
| Schematic | 6.3_LTC3406B- DVM ADVANCED.sxsch |
| Test | VOUT=0.6V|Bode Plot|Vin Maximum|100% Load |
| Date / Time | 2/7/2015 10:26:55 AM |
| Report Directory | promote_graphs\VOUT=0.6V\BodePlot\Vin Maximum\100% Load |
| Log File | report.txt |
| Screenshot | schematic.png |
| Status | FAIL |
| Simulator | simplis |
| Deck | input.deck |
| Init | input.deck.init |
| Measured Scalar Values | |
| Efficiency | 65.2962% |
| Frequency(CLK) | 955.68788kHertz |
| Power(LOAD) | 365.354m |
| Power(SRC) | 559.533m |
| gain_crossover_freq | 18.3383k |
| gain_crossover_freq_600mV | 18.3383k |
| gain_margin | 33.7095 |
| gain_margin_600mV | 33.7095 |
| min_phase | 54.3004 |
| phase_crossover_freq | 346.054k |
| min_phase_freq | 18.3383k |
| phase_margin | 54.2129 |
| phase_margin_600mV | 54.2129 |
| ILOAD | AVG 603.439m MIN 600.632m MAX 605.224m RMS 603.441m |
| ILOUT | AVG 603.439m MIN 390.456m MAX 830.726m RMS 616.687m |
| ISRC | AVG 101.745m MIN 465.682u MAX 831.192m RMS 254.453m |
| SW | AVG 665.793m MIN -1.03229 MAX 5.34314 RMS 2.14625 |
| VLOAD | AVG 605.449m MIN 602.632m MAX 607.24m RMS 605.451m |
| VOUT | AVG 605.449m MIN 602.632m MAX 607.24m RMS 605.451m |
| VSRC | AVG 5.4999 MIN 5.49917 MAX 5.5 RMS 5.4999 |
| Measured Spec Values | |
| Max_VLOAD | PASS: Max. Output1 Voltage (607.24m) is less than or equal to Max. Output1 Voltage Spec (1.58025) |
| Min_VLOAD | FAIL: Min. Output1 Voltage (602.632m) is not greater than or equal to Min. Output1 Voltage Spec (1.42975) |
| Min_VLOAD_vs_avg | FAIL: Avg. Output1 Voltage (605.449m) is not greater than or equal to Min. Output1 Voltage Spec (1.42975) |
| Min_VLOAD_vs_max | FAIL: Max. Output1 Voltage (607.24m) is not greater than or equal to Min. Output1 Voltage Spec (1.42975) |
| min_gain_margin | PASS: Gain Margin (33.7095) is greater than Min. Gain Margin (12) |
| min_phase_margin | PASS: Phase Margin (54.2129) is greater than Min. Phase Margin (35) |
 Bode Plot
GAIN
PHASE
|
|
| SXGPH File | simplis_ac5_259.sxgph |
 LOAD
VLOAD
ILOAD
|
|
| SXGPH File | simplis_pop6_242.sxgph |
 SRC
VSRC
ISRC
|
|
| SXGPH File | simplis_pop6_232.sxgph |
 default
CLK
ILOUT
SW
VOUT
|
|
| SXGPH File | simplis_pop6_237.sxgph |
| Other SXGPH Files | |
| clock#pop | simplis_pop6_224.sxgph |
| DVM Bode Plot Input#log#ac | simplis_ac5_266.sxgph |
