SIMPLIS Parts

Analog-to-Digital Converter

The Analog-to-Digital Converter (ADC) models a generic flash-type ADC.

The ADC starts the conversion at the rising or falling edge of the clock, depending on the selected value of the Trigger Condition.
The sampling of the analog input signal begins at this point and is complete after the interval specified by Sample delay.
The output data changes in response to the clock trigger event, which occurs after the number of seconds specified by Convert Time.
At the same time that the output initially changes, the Data Ready output goes low (inactive) and then high again after a delay equal to Data Ready delay.

Note: It is possible to start a new conversion before the previous conversion is complete if the next conversion starts more than the number of seconds specified by the Minimum Clock Width after the previous conversion started. The Minimum Clock Width must always be less than Convert Time. If the Minimum Clock Width specification is violated, the conversion does not start.

This model has a constant voltage reference. For an analog-to-digital converter with an adjustable voltage reference, see Analog-to-Digital Converter with Adjustable Voltage Reference.

In this Topic ShowHide

Editing the Analog-to-Digital Converter
Examples
Waveforms
Subcircuit Parameters

Model Name:	Analog-to-Digital Converter
Simulator:		This device is compatible with the SIMPLIS simulator.
Parts Selector Menu Location:	Digital Functions \| A to D / D to A
Symbol Library:	None - the symbol is automatically generated when placed or edited.
Model File:	None - the device model is generated before simulation.
Subcircuit Name:	SIMPLIS_DIGI1_D_A2D_CONVERTER_Y
Symbols:
Multiple Selections:	Only one device at a time can be edited.

Editing the Analog-to-Digital Converter

To configure the analog-to-digital converter, follow these steps:

Double click the symbol on the schematic to open the editing dialog to the Parameters tab.
Make the appropriate changes to the fields described in the table below the image.

Label

Parameter Description

Code

Encoding scheme for binary inputs of the ADC

Number of Bits

Number of input bits for this A-to-D Converter

Input Range

Analog input voltage range

Input Offset

Midpoint of analog input voltage range

Trigger Condition

Determines the triggering condition of the ADC clock pin:

0_TO_1 for rising edge triggered
1_TO_0 for falling edge triggered

Convert Time

Time required to convert analog input to digital output

Data Ready Delay

Delay from when the output changes until the data-ready signal is true

Enable Delay

Delay from when the enable pin goes active until the output is enabled

Sample Delay

Time required to sample the analog input

Minimum Clock Width

Minimum valid clock width

Initial Condition

Initial condition of the converter output

Initial Condition of Data Ready

Initial condition of the data ready output of a device

Initial Condition of Overflow

Initial condition of the overflow outputs of the ADC

Initial Condition of Overflow	POFL	NOFL
POS	1	0
NEG	0	1
NONE	0	0

To define the parameters for the interface between this digital component and each analog component connected directly to an input or output pin, follow these steps from the Edit Analog-to-Digital Converter dialog box:

Click on the Interface tab.
Make the appropriate changes to the fields described in the table below the image.

Label

Parameter Description

Input Resistance

Input resistance of each input pin

Threshold

Hysteresis

The Threshold (T) and Hysteresis (H) of the Schmitt trigger input buffer on each ADC input. To determine the low-to-high threshold (TH) and the high-to-low threshold (TL), substitute Threshold (T) and Hysteresis (H) in each of the following formulas :

Input Logic Transition	Actual Threshold
0 ➞ 1	TH = Threshold + 0.5 * Hysteresis
1 ➞ 0	TL = Threshold - 0.5 * Hysteresis

Output Resistance

Output resistance of each pin

Output High Voltage

Output high voltage for the divider output pins

Output Low Voltage

Output low voltage for the divider output pins

Examples

The test circuit used to generate the waveform examples in the next section can be downloaded here: simplis_060_adc_example.sxsch.

Waveforms

The waveforms below show the ADC operation with a sine-wave input.

During the first 1us of simulation time, the ADC output samples the analog input voltage, outputting the quantized value on pins D0-D4.
At 1us, the EN pin transitions from a high to a low digital state, disabling the ADC.
The ADC output is at decimal 15 until the EN pin transitions from low to high at 1.5us.
The negative-overflow (NOFL) output transitions to high when the sine-wave input voltage reaches a negative value at 1.85us.

The timing waveforms pictured below show the detailed timing delays for the ADC.

In this example, the Convert Time of the ADC is 50ps and the Data Ready Delay is 10ps.
The outputs D1, D2, and D3 all change state 50ps after the clock edge (50ps is the value of Convert Time).
The Data Ready Delay defines the width of the data-ready pulse. At this particular clock edge, the D0 output does not change because the digital output word changes from decimal 7 to decimal 9, and the D0 bit is, therefore, a logic high.

Subcircuit Parameters

Because this analog-to-digital converter model is generated by a template script when the simulation is executed, a fixed model cannot be inserted into a netlist. The template script for this device is simplis_make_a2d_model.sxscr, which you, as a licensed user, can download in a zip archive of all built-in scripts.

To download this zip file, follow these steps:

Note: You will be prompted to log in with the user name and password given to you when you registered.

Click here to go to the product-installation page on the SIMetrix website.
Click Download Links in the first paragraph of the product-installation web page.
Scroll down to the Built-in Scripts section.
Right click on Download and select Save target as..., and then navigate to a location on your computer to save the zip file.