SIMPLIS Parts

Asymmetric Delay

The Asymmetric Delay models a digital delay with different delay times for the rising and falling edges.

In this Topic Hide

Model Name:

Asymmetric Delay

Simulator:

This device is compatible with the SIMPLIS simulator.

Parts Selector
Menu Location:

Digital Functions | Functions

Symbol Library:

None - the symbol is automatically generated when placed or edited.

Model File:

SIMPLIS_DIGI1.LB

Subcircuit Name:

  • SIMPLIS_DIGI1_D_ASYMMETRIC_DELAY_Y
  • SIMPLIS_DIGI1_D_ASYMMETRIC_DELAY_N

Symbols:

Multiple Selections:

Only one device at a time can be edited.

Editing the Asymmetric Delay

To configure the Asymmetric Delay, follow these steps:

  1. Double click the symbol on the schematic to open the editing dialog to the Parameters tab.
  2. Make the appropriate changes to the fields described in the table below the image.
Label Parameter Description

Rise Delay

Delay from the rising edge of the input until the output changes

Fall Delay

Delay from the falling edge of the input until the output changes

Initial Condition

Initial condition of the output at time=0

Ground Ref

Determines whether or not a device has a ground reference pin.

Any digital component that has an input or output pin connected to an analog circuit node must have its Ground Ref pin connected to an analog node. This is usually ground on the schematic. Click on the Help button for more information.

To define the parameters for the interface between this digital component and each analog component connected directly to an input or output pin, follow these steps from the Edit Asymmetric Delay dialog box:

  1. Click on the   Interface   tab.
  2. Make the appropriate changes to the fields described in the table below the image.
Label Parameter Description

Input Resistance

Input resistance of each input pin

Threshold

Hysteresis

The Threshold (T) and Hysteresis (H) of the Schmitt trigger input buffer on each Asymmetric Delay input. To determine the low-to-high threshold (TH) and the high-to-low threshold (TL), substitute Threshold (T) and Hysteresis (H) in each of the following formulas :
Input Logic Transition Actual Threshold
0 ➞ 1 TH = Threshold + 0.5 * Hysteresis
1 ➞ 0 TL = Threshold - 0.5 * Hysteresis
 

Output Resistance

Output resistance of the output pin.

Output High Voltage

Output high voltage for the output pin.

Output Low Voltage

Output low voltage for the output pin.

Examples

The test circuit used to generate the waveform examples in the next section can be downloaded here: simplis_022_asymmetricdelay_example.sxsch.

Waveforms

The waveforms below were taken from an asymmetric delay block with a rising edge delay of 200ns, and a falling edge delay of 500ns. The first input pulse is delayed as expected, while the second input pulse is not propagated to the output. This is because the second input pulse width is less than the propagation delay of the asymmetric delay.

Subcircuit Parameters

The subcircuit parameters, parameter names, data types, ranges, units, and descriptions are in the following table. The parameter names can be used to directly generate netlist entries for the device. For example, the netlist entry for an asymmetric delay without ground reference would be as follows:
X$U1 2 1 SIMPLIS_DIGI1_D_ASYMMETRIC_DELAY_N vars: IC=0 RIN=10Meg ROUT=10 TH=2.5 HYSTWD=1.0 VOL=0 VOH=5 RISE_DELAY=2p FALL_DELAY=2p GNDREF='N'


Parameter Name Label Data Type Range Units Parameter Description

FALL_DELAY

Fall Delay

  

1f to 1024

s

Delay from the falling edge of the input until the output changes

HYSTWD

Hysteresis

    

V

The Threshold (T) and Hysteresis (H) of the Schmitt trigger input buffer on each Asymmetric Delay input. To determine the low-to-high threshold (TH) and the high-to-low threshold (TL), substitute Threshold (T) and Hysteresis (H) in each of the following formulas :

Input Logic Transition Actual Threshold
0 ➞ 1 TH = Threshold + 0.5 * Hysteresis
1 ➞ 0 TL = Threshold - 0.5 * Hysteresis
 

IC

Initial Condition

LIST

0,
1

  

Initial condition of the output at time=0

RIN

Input Resistance

  

min: 100

Ω

Input resistance of each input pin

VOH

Output High Voltage

    

V

Output high voltage for the output pin.

VOL

Output Low Voltage

    

V

Output low voltage for the output pin.

ROUT

Output Resistance

  

min: 1m

Ω

Output resistance of the output pin.

RISE_DELAY

Rise Delay

  

1f to 1024

s

Delay from the rising edge of the input until the output changes

TH

Threshold

    

V

The Threshold (T) and Hysteresis (H) of the Schmitt trigger input buffer on each Asymmetric Delay input. To determine the low-to-high threshold (TH) and the high-to-low threshold (TL), substitute Threshold (T) and Hysteresis (H) in each of the following formulas :

Input Logic Transition Actual Threshold
0 ➞ 1 TH = Threshold + 0.5 * Hysteresis
1 ➞ 0 TL = Threshold - 0.5 * Hysteresis