* SCHEMATIC : ..\..\DVM_PFC_Continuous_Conduction_Mode.sxsch
* TESTPLAN : dvm_advanced.testplan
* ORIGINALTP: dvm_builtin-acdc_1in_1out.testplan
* DATE : 2015-12-10
* TIME : 6:17 PM
* REPORT DIR: D:\documentation.simplistechnologies.com\branches\build80_xml\library\examples\dvm_tutorial\PFC\DVM_REPORTS\2015-12-10-6_17_PM
* NUM TESTS : 17
* HTMLTITLE : SIMPLIS DVM Test Report Overview
*
*
* TEST : Transient|FindACSteadyState|LL_Nominal|F_High|Enabled|Light Load
* PROGRESS : 1 of 17
* SIMULATOR : simplis
* EXECUTED : SIMPLIS
* LOG : D:\documentation.simplistechnologies.com\branches\build80_xml\library\examples\dvm_tutorial\PFC\DVM_REPORTS\2015-12-10-6_17_PM\Transient\FindACSteadyState\LL_Nominal\F_High\Enabled\Light Load/report.txt
* DECK : Transient\FindACSteadyState\LL_Nominal\F_High\Enabled\Light Load\input.deck
* INIT : Transient\FindACSteadyState\LL_Nominal\F_High\Enabled\Light Load\input.deck.init
* STATUS : RUN
* RSTATUS : PASS
* REPORT : Transient\FindACSteadyState\LL_Nominal\F_High\Enabled\Light Load\report.txt.html
* TEST TIME : 116 seconds
*
* TEST : Transient|FindACSteadyState|HL_Maximum|F_Low|Enabled|100% Load
* PROGRESS : 2 of 17
* SIMULATOR : simplis
* EXECUTED : SIMPLIS
* LOG : D:\documentation.simplistechnologies.com\branches\build80_xml\library\examples\dvm_tutorial\PFC\DVM_REPORTS\2015-12-10-6_17_PM\Transient\FindACSteadyState\HL_Maximum\F_Low\Enabled\100% Load/report.txt
* DECK : Transient\FindACSteadyState\HL_Maximum\F_Low\Enabled\100% Load\input.deck
* INIT : Transient\FindACSteadyState\HL_Maximum\F_Low\Enabled\100% Load\input.deck.init
* STATUS : RUN
* RSTATUS : PASS
* REPORT : Transient\FindACSteadyState\HL_Maximum\F_Low\Enabled\100% Load\report.txt.html
* TEST TIME : 92 seconds
*
* TEST : Transient|FindACSteadyState|HL_Maximum|F_Low|Disabled|Light Load
* PROGRESS : 3 of 17
* SIMULATOR : simplis
* EXECUTED : SIMPLIS
* LOG : D:\documentation.simplistechnologies.com\branches\build80_xml\library\examples\dvm_tutorial\PFC\DVM_REPORTS\2015-12-10-6_17_PM\Transient\FindACSteadyState\HL_Maximum\F_Low\Disabled\Light Load/report.txt
* DECK : Transient\FindACSteadyState\HL_Maximum\F_Low\Disabled\Light Load\input.deck
* INIT : Transient\FindACSteadyState\HL_Maximum\F_Low\Disabled\Light Load\input.deck.init
* STATUS : RUN
* RSTATUS : PASS
* REPORT : Transient\FindACSteadyState\HL_Maximum\F_Low\Disabled\Light Load\report.txt.html
* TEST TIME : 12 seconds
*
* TEST : Transient|ACSteadyState|HL_Maximum|F_Low|Light Load
* PROGRESS : 4 of 17
* SIMULATOR : simplis
* EXECUTED : SIMPLIS
* LOG : D:\documentation.simplistechnologies.com\branches\build80_xml\library\examples\dvm_tutorial\PFC\DVM_REPORTS\2015-12-10-6_17_PM\Transient\ACSteadyState\HL_Maximum\F_Low\Light Load/report.txt
* DECK : Transient\ACSteadyState\HL_Maximum\F_Low\Light Load\input.deck
* INIT : Transient\ACSteadyState\HL_Maximum\F_Low\Light Load\input.deck.init
* STATUS : RUN
* RSTATUS : FAIL
* REPORT : Transient\ACSteadyState\HL_Maximum\F_Low\Light Load\report.txt.html
* TEST TIME : 30 seconds
*
* TEST : Transient|ACSteadyState|LL_Nominal|F_High|50% Load
* PROGRESS : 5 of 17
* SIMULATOR : simplis
* EXECUTED : SIMPLIS
* LOG : D:\documentation.simplistechnologies.com\branches\build80_xml\library\examples\dvm_tutorial\PFC\DVM_REPORTS\2015-12-10-6_17_PM\Transient\ACSteadyState\LL_Nominal\F_High\50% Load/report.txt
* DECK : Transient\ACSteadyState\LL_Nominal\F_High\50% Load\input.deck
* INIT : Transient\ACSteadyState\LL_Nominal\F_High\50% Load\input.deck.init
* STATUS : RUN
* RSTATUS : FAIL
* REPORT : Transient\ACSteadyState\LL_Nominal\F_High\50% Load\report.txt.html
* TEST TIME : 30 seconds
*
* TEST : Transient|ControlStartup|HL_Maximum|F_Low|Light Load
* PROGRESS : 6 of 17
* SIMULATOR : simplis
* EXECUTED : SIMPLIS
* LOG : D:\documentation.simplistechnologies.com\branches\build80_xml\library\examples\dvm_tutorial\PFC\DVM_REPORTS\2015-12-10-6_17_PM\Transient\ControlStartup\HL_Maximum\F_Low\Light Load/report.txt
* DECK : Transient\ControlStartup\HL_Maximum\F_Low\Light Load\input.deck
* INIT : Transient\ControlStartup\HL_Maximum\F_Low\Light Load\input.deck.init
* STATUS : RUN
* RSTATUS : PASS
* REPORT : Transient\ControlStartup\HL_Maximum\F_Low\Light Load\report.txt.html
* TEST TIME : 92 seconds
*
* TEST : Transient|ControlStartup|LL_Maximum|F_High|100% Load
* PROGRESS : 7 of 17
* SIMULATOR : simplis
* EXECUTED : SIMPLIS
* LOG : D:\documentation.simplistechnologies.com\branches\build80_xml\library\examples\dvm_tutorial\PFC\DVM_REPORTS\2015-12-10-6_17_PM\Transient\ControlStartup\LL_Maximum\F_High\100% Load/report.txt
* DECK : Transient\ControlStartup\LL_Maximum\F_High\100% Load\input.deck
* INIT : Transient\ControlStartup\LL_Maximum\F_High\100% Load\input.deck.init
* STATUS : RUN
* RSTATUS : PASS
* REPORT : Transient\ControlStartup\LL_Maximum\F_High\100% Load\report.txt.html
* TEST TIME : 104 seconds
*
* TEST : Transient|LineStartup|LL_Maximum|F_High|Light Load
* PROGRESS : 8 of 17
* SIMULATOR : simplis
* EXECUTED : SIMPLIS
* LOG : D:\documentation.simplistechnologies.com\branches\build80_xml\library\examples\dvm_tutorial\PFC\DVM_REPORTS\2015-12-10-6_17_PM\Transient\LineStartup\LL_Maximum\F_High\Light Load/report.txt
* DECK : Transient\LineStartup\LL_Maximum\F_High\Light Load\input.deck
* INIT : Transient\LineStartup\LL_Maximum\F_High\Light Load\input.deck.init
* STATUS : RUN
* RSTATUS : FAIL
* REPORT : Transient\LineStartup\LL_Maximum\F_High\Light Load\report.txt.html
* TEST TIME : 99 seconds
*
* TEST : Transient|LineStartup|HL_Maximum|F_Low|100% Load
* PROGRESS : 9 of 17
* SIMULATOR : simplis
* EXECUTED : SIMPLIS
* LOG : D:\documentation.simplistechnologies.com\branches\build80_xml\library\examples\dvm_tutorial\PFC\DVM_REPORTS\2015-12-10-6_17_PM\Transient\LineStartup\HL_Maximum\F_Low\100% Load/report.txt
* DECK : Transient\LineStartup\HL_Maximum\F_Low\100% Load\input.deck
* INIT : Transient\LineStartup\HL_Maximum\F_Low\100% Load\input.deck.init
* STATUS : RUN
* RSTATUS : FAIL
* REPORT : Transient\LineStartup\HL_Maximum\F_Low\100% Load\report.txt.html
* TEST TIME : 71 seconds
*
* TEST : Transient|LineDropout|HL_Nominal|F_Low|1Cycles|100% Load
* PROGRESS : 10 of 17
* SIMULATOR : simplis
* EXECUTED : SIMPLIS
* LOG : D:\documentation.simplistechnologies.com\branches\build80_xml\library\examples\dvm_tutorial\PFC\DVM_REPORTS\2015-12-10-6_17_PM\Transient\LineDropout\HL_Nominal\F_Low\1Cycles\100% Load/report.txt
* DECK : Transient\LineDropout\HL_Nominal\F_Low\1Cycles\100% Load\input.deck
* INIT : Transient\LineDropout\HL_Nominal\F_Low\1Cycles\100% Load\input.deck.init
* STATUS : RUN
* RSTATUS : FAIL
* REPORT : Transient\LineDropout\HL_Nominal\F_Low\1Cycles\100% Load\report.txt.html
* TEST TIME : 47 seconds
*
* TEST : Transient|LineDropout|HL_Nominal|F_High|1Cycles|100% Load
* PROGRESS : 11 of 17
* SIMULATOR : simplis
* EXECUTED : SIMPLIS
* LOG : D:\documentation.simplistechnologies.com\branches\build80_xml\library\examples\dvm_tutorial\PFC\DVM_REPORTS\2015-12-10-6_17_PM\Transient\LineDropout\HL_Nominal\F_High\1Cycles\100% Load/report.txt
* DECK : Transient\LineDropout\HL_Nominal\F_High\1Cycles\100% Load\input.deck
* INIT : Transient\LineDropout\HL_Nominal\F_High\1Cycles\100% Load\input.deck.init
* STATUS : RUN
* RSTATUS : FAIL
* REPORT : Transient\LineDropout\HL_Nominal\F_High\1Cycles\100% Load\report.txt.html
* TEST TIME : 41 seconds
*
* TEST : Transient|LineSag|HL_Nominal_to_HL_Sag|F_Low|50% Load
* PROGRESS : 12 of 17
* SIMULATOR : simplis
* EXECUTED : SIMPLIS
* LOG : D:\documentation.simplistechnologies.com\branches\build80_xml\library\examples\dvm_tutorial\PFC\DVM_REPORTS\2015-12-10-6_17_PM\Transient\LineSag\HL_Nominal_to_HL_Sag\F_Low\50% Load/report.txt
* DECK : Transient\LineSag\HL_Nominal_to_HL_Sag\F_Low\50% Load\input.deck
* INIT : Transient\LineSag\HL_Nominal_to_HL_Sag\F_Low\50% Load\input.deck.init
* STATUS : RUN
* RSTATUS : PASS
* REPORT : Transient\LineSag\HL_Nominal_to_HL_Sag\F_Low\50% Load\report.txt.html
* TEST TIME : 84 seconds
*
* TEST : Transient|LineSag|LL_Nominal_to_LL_Sag|F_High|100% Load
* PROGRESS : 13 of 17
* SIMULATOR : simplis
* EXECUTED : SIMPLIS
* LOG : D:\documentation.simplistechnologies.com\branches\build80_xml\library\examples\dvm_tutorial\PFC\DVM_REPORTS\2015-12-10-6_17_PM\Transient\LineSag\LL_Nominal_to_LL_Sag\F_High\100% Load/report.txt
* DECK : Transient\LineSag\LL_Nominal_to_LL_Sag\F_High\100% Load\input.deck
* INIT : Transient\LineSag\LL_Nominal_to_LL_Sag\F_High\100% Load\input.deck.init
* STATUS : RUN
* RSTATUS : FAIL
* REPORT : Transient\LineSag\LL_Nominal_to_LL_Sag\F_High\100% Load\report.txt.html
* TEST TIME : 77 seconds
*
* TEST : Transient|LineSurge|HL_Maximum_to_HL_Surge|F_High|Light Load
* PROGRESS : 14 of 17
* SIMULATOR : simplis
* EXECUTED : SIMPLIS
* LOG : D:\documentation.simplistechnologies.com\branches\build80_xml\library\examples\dvm_tutorial\PFC\DVM_REPORTS\2015-12-10-6_17_PM\Transient\LineSurge\HL_Maximum_to_HL_Surge\F_High\Light Load/report.txt
* DECK : Transient\LineSurge\HL_Maximum_to_HL_Surge\F_High\Light Load\input.deck
* INIT : Transient\LineSurge\HL_Maximum_to_HL_Surge\F_High\Light Load\input.deck.init
* STATUS : RUN
* RSTATUS : PASS
* REPORT : Transient\LineSurge\HL_Maximum_to_HL_Surge\F_High\Light Load\report.txt.html
* TEST TIME : 40 seconds
*
* TEST : Transient|LineSurge|HL_Maximum_to_HL_Surge|F_Low|100% Load
* PROGRESS : 15 of 17
* SIMULATOR : simplis
* EXECUTED : SIMPLIS
* LOG : D:\documentation.simplistechnologies.com\branches\build80_xml\library\examples\dvm_tutorial\PFC\DVM_REPORTS\2015-12-10-6_17_PM\Transient\LineSurge\HL_Maximum_to_HL_Surge\F_Low\100% Load/report.txt
* DECK : Transient\LineSurge\HL_Maximum_to_HL_Surge\F_Low\100% Load\input.deck
* INIT : Transient\LineSurge\HL_Maximum_to_HL_Surge\F_Low\100% Load\input.deck.init
* STATUS : RUN
* RSTATUS : PASS
* REPORT : Transient\LineSurge\HL_Maximum_to_HL_Surge\F_Low\100% Load\report.txt.html
* TEST TIME : 74 seconds
*
* TEST : Transient|LoadTrAC|LL_Nominal|F_High|Light Load to 50% Load to Light Load
* PROGRESS : 16 of 17
* SIMULATOR : simplis
* EXECUTED : SIMPLIS
* LOG : D:\documentation.simplistechnologies.com\branches\build80_xml\library\examples\dvm_tutorial\PFC\DVM_REPORTS\2015-12-10-6_17_PM\Transient\LoadTrAC\LL_Nominal\F_High\Light Load to 50% Load to Light Load/report.txt
* DECK : Transient\LoadTrAC\LL_Nominal\F_High\Light Load to 50% Load to Light Load\input.deck
* INIT : Transient\LoadTrAC\LL_Nominal\F_High\Light Load to 50% Load to Light Load\input.deck.init
* STATUS : RUN
* RSTATUS : PASS
* REPORT : Transient\LoadTrAC\LL_Nominal\F_High\Light Load to 50% Load to Light Load\report.txt.html
* TEST TIME : 71 seconds
*
* TEST : Transient|LoadTrAC|HL_Nominal|F_Low|Light Load to 100% Load to Light Load
* PROGRESS : 17 of 17
* SIMULATOR : simplis
* EXECUTED : SIMPLIS
* LOG : D:\documentation.simplistechnologies.com\branches\build80_xml\library\examples\dvm_tutorial\PFC\DVM_REPORTS\2015-12-10-6_17_PM\Transient\LoadTrAC\HL_Nominal\F_Low\Light Load to 100% Load to Light Load/report.txt
* DECK : Transient\LoadTrAC\HL_Nominal\F_Low\Light Load to 100% Load to Light Load\input.deck
* INIT : Transient\LoadTrAC\HL_Nominal\F_Low\Light Load to 100% Load to Light Load\input.deck.init
* STATUS : RUN
* RSTATUS : PASS
* REPORT : Transient\LoadTrAC\HL_Nominal\F_Low\Light Load to 100% Load to Light Load\report.txt.html
* TEST TIME : 78 seconds
*
*
* TOTAL TIME: 1172 seconds
* TESTS RUN : 17 of 17