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» DVM Test Report: Steady-State|Steady-State|Vin Maximum|40%

Test Details
Schematic 4.2_LTC3406B - DVM ADVANCED.sxsch
Test Steady-State|Steady-State|Vin Maximum|40%
Date / Time 12/10/2015 5:45 PM
Report Directory run_blt_in_and_prmt_grphs\Steady-State\Steady-State\VinMaximum\40%
Log File report.txt
Screenshot schematic.png
Status PASS
Simulator simplis
Deck input.deck
Init input.deck.init
Measured Scalar Values
Efficiency 82.0332%
Efficiency_Max 82.0332%
Frequency(CLK) 955.656k
ILOAD
AVG
600.277m
MIN
598.6m
MAX
601.61m
RMS
600.278m
PK2PK
3.01024m
ISRC
AVG
200.349m
MIN
465.691u
MAX
893.103m
RMS
361.661m
PK2PK
892.637m
Power(LOAD) 903.831m
Power(SRC) 1.10179
VLOAD
AVG
1.50569
MIN
1.50148
MAX
1.50903
RMS
1.50569
PK2PK
7.55062m
VSRC
AVG
5.4998
MIN
5.49911
MAX
5.5
RMS
5.4998
PK2PK
892.637u
Measured Spec Values
Max_VLOAD PASS: Max. Output1 Voltage (1.50903) is less than or equal to Max. Output1 Voltage Spec (1.58025)
Min_VLOAD PASS: Min. Output1 Voltage (1.50148) is greater than or equal to Min. Output1 Voltage Spec (1.42975)
LOAD
VLOAD
ILOAD
SXGPH File simplis_pop16_544.sxgph
SRC
VSRC
ISRC
SXGPH File simplis_pop16_534.sxgph
default
CLK
ILOUT
SW
VOUT
SXGPH File simplis_pop16_539.sxgph
Other SXGPH Files
clock#pop simplis_pop16_526.sxgph