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» DVM Test Report: Steady-State|Steady-State|Vin Maximum|30%

Test Details
Schematic 4.2_LTC3406B - DVM ADVANCED.sxsch
Test Steady-State|Steady-State|Vin Maximum|30%
Date / Time 12/10/2015 5:45 PM
Report Directory run_blt_in_and_prmt_grphs\Steady-State\Steady-State\VinMaximum\30%
Log File report.txt
Screenshot schematic.png
Status PASS
Simulator simplis
Deck input.deck
Init input.deck.init
Measured Scalar Values
Efficiency 85.0844%
Efficiency_Max 85.0844%
Frequency(CLK) 955.66k
ILOAD
AVG
450.212m
MIN
448.972m
MAX
451.179m
RMS
450.212m
PK2PK
2.20782m
ISRC
AVG
144.872m
MIN
465.635u
MAX
736.893m
RMS
273.107m
PK2PK
736.428m
Power(LOAD) 677.884m
Power(SRC) 796.719m
VLOAD
AVG
1.5057
MIN
1.50155
MAX
1.50893
RMS
1.5057
PK2PK
7.38386m
VSRC
AVG
5.49986
MIN
5.49926
MAX
5.5
RMS
5.49986
PK2PK
736.428u
Measured Spec Values
Max_VLOAD PASS: Max. Output1 Voltage (1.50893) is less than or equal to Max. Output1 Voltage Spec (1.58025)
Min_VLOAD PASS: Min. Output1 Voltage (1.50155) is greater than or equal to Min. Output1 Voltage Spec (1.42975)
LOAD
VLOAD
ILOAD
SXGPH File simplis_pop15_509.sxgph
SRC
ISRC
VSRC
SXGPH File simplis_pop15_499.sxgph
default
CLK
ILOUT
SW
VOUT
SXGPH File simplis_pop15_504.sxgph
Other SXGPH Files
clock#pop simplis_pop15_491.sxgph