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» DVM Test Report: Steady-State|Steady-State|Vin Nominal|70%

Test Details
Schematic 4.2_LTC3406B - DVM ADVANCED.sxsch
Test Steady-State|Steady-State|Vin Nominal|70%
Date / Time 12/10/2015 5:44 PM
Report Directory run_blt_in_and_prmt_grphs\Steady-State\Steady-State\VinNominal\70%
Log File report.txt
Screenshot schematic.png
Status PASS
Simulator simplis
Deck input.deck
Init input.deck.init
Measured Scalar Values
Efficiency 73.5452%
Efficiency_nom 73.5452%
Frequency(CLK) 955.642k
ILOAD
AVG
1.05043
MIN
1.04765
MAX
1.05288
RMS
1.05043
PK2PK
5.23767m
ISRC
AVG
430.179m
MIN
423.542u
MAX
1.33974
RMS
682.488m
PK2PK
1.33931
Power(LOAD) 1.58154
Power(SRC) 2.15043
VLOAD
AVG
1.50561
MIN
1.50162
MAX
1.50913
RMS
1.50561
PK2PK
7.50729m
VSRC
AVG
4.99957
MIN
4.99866
MAX
5
RMS
4.99957
PK2PK
1.33931m
Measured Spec Values
Max_VLOAD PASS: Max. Output1 Voltage (1.50913) is less than or equal to Max. Output1 Voltage Spec (1.58025)
Min_VLOAD PASS: Min. Output1 Voltage (1.50162) is greater than or equal to Min. Output1 Voltage Spec (1.42975)
LOAD
VLOAD
ILOAD
SXGPH File simplis_pop8_264.sxgph
SRC
VSRC
ISRC
SXGPH File simplis_pop8_254.sxgph
default
CLK
ILOUT
SW
VOUT
SXGPH File simplis_pop8_259.sxgph
Other SXGPH Files
clock#pop simplis_pop8_246.sxgph