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» DVM Test Report: Steady-State|Input 1 Minimum Voltage, Output 1 50% Load

Test Details
Schematic 4.2_LTC3406B - DVM ADVANCED.sxsch
Test Steady-State|Input 1 Minimum Voltage, Output 1 50% Load
Date / Time 12/10/2015 5:48 PM
Report Directory run_line_load_testplan\Steady-State\Input1 Minimum Voltage, Output 1 50% Load
Log File report.txt
Screenshot schematic.png
Status PASS
Simulator simplis
Deck input.deck
Init input.deck.init
Measured Scalar Values
Efficiency 79.2658%
Frequency(CLK) 955.649k
ILOAD
AVG
750.292m
MIN
748.501m
MAX
751.897m
RMS
750.293m
PK2PK
3.39604m
ISRC
AVG
316.747m
MIN
381.114u
MAX
1.01266
RMS
498.933m
PK2PK
1.01228
Power(LOAD) 1.12963
Power(SRC) 1.42511
VLOAD
AVG
1.50558
MIN
1.50199
MAX
1.5088
RMS
1.50558
PK2PK
6.8147m
VSRC
AVG
4.49968
MIN
4.49899
MAX
4.5
RMS
4.49968
PK2PK
1.01228m
Measured Spec Values
Max_VLOAD PASS: Max. Output1 Voltage (1.5088) is less than or equal to Max. Output1 Voltage Spec (1.58025)
Min_VLOAD PASS: Min. Output1 Voltage (1.50199) is greater than or equal to Min. Output1 Voltage Spec (1.42975)
LOAD
VLOAD
ILOAD
SXGPH File simplis_pop5_159.sxgph
SRC
VSRC
ISRC
SXGPH File simplis_pop5_149.sxgph
default
CLK
ILOUT
SW
VOUT
SXGPH File simplis_pop5_154.sxgph
Other SXGPH Files
clock#pop simplis_pop5_141.sxgph