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» DVM Test Report: Steady-State|Steady-State|Vin Minimum|80%

Test Details
Schematic 4.2_LTC3406B - DVM ADVANCED.sxsch
Test Steady-State|Steady-State|Vin Minimum|80%
Date / Time 12/10/2015 5:47 PM
Report Directory run_blt_in_and_prmt_grphs\Steady-State\Steady-State\VinMinimum\80%
Log File report.txt
Screenshot schematic.png
Status PASS
Simulator simplis
Deck input.deck
Init input.deck.init
Measured Scalar Values
Efficiency 71.0788%
Efficiency_Min 71.0788%
Frequency(CLK) 955.64k
ILOAD
AVG
1.20044
MIN
1.1976
MAX
1.20316
RMS
1.20044
PK2PK
5.56063m
ISRC
AVG
565.199m
MIN
381.279u
MAX
1.46786
RMS
832.246m
PK2PK
1.46748
Power(LOAD) 1.80733
Power(SRC) 2.5427
VLOAD
AVG
1.50555
MIN
1.50199
MAX
1.50896
RMS
1.50555
PK2PK
6.97395m
VSRC
AVG
4.49943
MIN
4.49853
MAX
4.5
RMS
4.49943
PK2PK
1.46748m
Measured Spec Values
Max_VLOAD PASS: Max. Output1 Voltage (1.50896) is less than or equal to Max. Output1 Voltage Spec (1.58025)
Min_VLOAD PASS: Min. Output1 Voltage (1.50199) is greater than or equal to Min. Output1 Voltage Spec (1.42975)
LOAD
VLOAD
ILOAD
SXGPH File simplis_pop31_1069.sxgph
SRC
VSRC
ISRC
SXGPH File simplis_pop31_1059.sxgph
default
CLK
ILOUT
SW
VOUT
SXGPH File simplis_pop31_1064.sxgph
Other SXGPH Files
clock#pop simplis_pop31_1051.sxgph