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» DVM Test Report: Steady-State|Steady-State|Vin Nominal|10%

Test Details
Schematic 4.2_LTC3406B - DVM ADVANCED.sxsch
Test Steady-State|Steady-State|Vin Nominal|10%
Date / Time 12/10/2015 5:43 PM
Report Directory run_blt_in_and_prmt_grphs\Steady-State\Steady-State\VinNominal\10%
Log File report.txt
Screenshot schematic.png
Status PASS
Simulator simplis
Deck input.deck
Init input.deck.init
Measured Scalar Values
Efficiency 90.7539%
Efficiency_nom 90.7539%
Frequency(CLK) 955.682k
ILOAD
AVG
150.07m
MIN
149.739m
MAX
150.339m
RMS
150.071m
PK2PK
599.924u
ISRC
AVG
49.7983m
MIN
313.537u
MAX
500.173m
RMS
114.693m
PK2PK
499.859m
Power(LOAD) 225.957m
Power(SRC) 248.978m
VLOAD
AVG
1.50567
MIN
1.50235
MAX
1.50837
RMS
1.50567
PK2PK
6.01905m
VSRC
AVG
4.99995
MIN
4.9995
MAX
5
RMS
4.99995
PK2PK
499.859u
Measured Spec Values
Max_VLOAD PASS: Max. Output1 Voltage (1.50837) is less than or equal to Max. Output1 Voltage Spec (1.58025)
Min_VLOAD PASS: Min. Output1 Voltage (1.50235) is greater than or equal to Min. Output1 Voltage Spec (1.42975)
LOAD
VLOAD
ILOAD
SXGPH File simplis_pop2_54.sxgph
SRC
VSRC
ISRC
SXGPH File simplis_pop2_44.sxgph
default
CLK
ILOUT
SW
VOUT
SXGPH File simplis_pop2_49.sxgph
Other SXGPH Files
clock#pop simplis_pop2_36.sxgph