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» DVM Test Report: Steady-State|Steady-State|Vin Nominal|100%

Test Details
Schematic 4.2_LTC3406B - DVM ADVANCED.sxsch
Test Steady-State|Steady-State|Vin Nominal|100%
Date / Time 12/10/2015 5:44 PM
Report Directory run_blt_in_and_prmt_grphs\Steady-State\Steady-State\VinNominal\100%
Log File report.txt
Screenshot schematic.png
Status PASS
Simulator simplis
Deck input.deck
Init input.deck.init
Measured Scalar Values
Efficiency 66.3939%
Efficiency_nom 66.3939%
Frequency(CLK) 955.632k
ILOAD
AVG
1.50058
MIN
1.49662
MAX
1.5043
RMS
1.50058
PK2PK
7.68087m
ISRC
AVG
680.765m
MIN
423.708u
MAX
1.79645
RMS
1.01922
PK2PK
1.79602
Power(LOAD) 2.25924
Power(SRC) 3.40279
VLOAD
AVG
1.50557
MIN
1.5016
MAX
1.5093
RMS
1.50558
PK2PK
7.70642m
VSRC
AVG
4.99932
MIN
4.9982
MAX
5
RMS
4.99932
PK2PK
1.79602m
Measured Spec Values
Max_VLOAD PASS: Max. Output1 Voltage (1.5093) is less than or equal to Max. Output1 Voltage Spec (1.58025)
Min_VLOAD PASS: Min. Output1 Voltage (1.5016) is greater than or equal to Min. Output1 Voltage Spec (1.42975)
LOAD
VLOAD
ILOAD
SXGPH File simplis_pop11_369.sxgph
SRC
VSRC
ISRC
SXGPH File simplis_pop11_359.sxgph
default
CLK
ILOUT
SW
VOUT
SXGPH File simplis_pop11_364.sxgph
Other SXGPH Files
clock#pop simplis_pop11_351.sxgph