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» DVM Test Report: Steady-State|Steady-State|Vin Nominal|60%

Test Details
Schematic 4.2_LTC3406B - DVM ADVANCED.sxsch
Test Steady-State|Steady-State|Vin Nominal|60%
Date / Time 12/10/2015 5:44 PM
Report Directory run_blt_in_and_prmt_grphs\Steady-State\Steady-State\VinNominal\60%
Log File report.txt
Screenshot schematic.png
Status PASS
Simulator simplis
Deck input.deck
Init input.deck.init
Measured Scalar Values
Efficiency 76.2486%
Efficiency_nom 76.2486%
Frequency(CLK) 955.646k
ILOAD
AVG
900.373m
MIN
897.996m
MAX
902.429m
RMS
900.375m
PK2PK
4.4329m
ISRC
AVG
355.646m
MIN
423.487u
MAX
1.18639
RMS
577.034m
PK2PK
1.18596
Power(LOAD) 1.35562
Power(SRC) 1.7779
VLOAD
AVG
1.50562
MIN
1.50164
MAX
1.50906
RMS
1.50562
PK2PK
7.41275m
VSRC
AVG
4.99964
MIN
4.99881
MAX
5
RMS
4.99964
PK2PK
1.18596m
Measured Spec Values
Max_VLOAD PASS: Max. Output1 Voltage (1.50906) is less than or equal to Max. Output1 Voltage Spec (1.58025)
Min_VLOAD PASS: Min. Output1 Voltage (1.50164) is greater than or equal to Min. Output1 Voltage Spec (1.42975)
LOAD
VLOAD
ILOAD
SXGPH File simplis_pop7_229.sxgph
SRC
VSRC
ISRC
SXGPH File simplis_pop7_219.sxgph
default
CLK
ILOUT
SW
VOUT
SXGPH File simplis_pop7_224.sxgph
Other SXGPH Files
clock#pop simplis_pop7_211.sxgph