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» DVM Test Report: Steady-State|Steady-State|Vin Minimum|40%

Test Details
Schematic 4.2_LTC3406B - DVM ADVANCED.sxsch
Test Steady-State|Steady-State|Vin Minimum|40%
Date / Time 12/10/2015 5:47 PM
Report Directory run_blt_in_and_prmt_grphs\Steady-State\Steady-State\VinMinimum\40%
Log File report.txt
Screenshot schematic.png
Status PASS
Simulator simplis
Deck input.deck
Init input.deck.init
Measured Scalar Values
Efficiency 82.3262%
Efficiency_Min 82.3262%
Frequency(CLK) 955.652k
ILOAD
AVG
600.24m
MIN
598.81m
MAX
601.494m
RMS
600.241m
PK2PK
2.68323m
ISRC
AVG
243.975m
MIN
381.059u
MAX
859.716m
RMS
395.854m
PK2PK
859.335m
Power(LOAD) 903.72m
Power(SRC) 1.09773
VLOAD
AVG
1.50559
MIN
1.50201
MAX
1.50874
RMS
1.5056
PK2PK
6.73038m
VSRC
AVG
4.49976
MIN
4.49914
MAX
4.5
RMS
4.49976
PK2PK
859.335u
Measured Spec Values
Max_VLOAD PASS: Max. Output1 Voltage (1.50874) is less than or equal to Max. Output1 Voltage Spec (1.58025)
Min_VLOAD PASS: Min. Output1 Voltage (1.50201) is greater than or equal to Min. Output1 Voltage Spec (1.42975)
LOAD
VLOAD
ILOAD
SXGPH File simplis_pop27_929.sxgph
SRC
VSRC
ISRC
SXGPH File simplis_pop27_919.sxgph
default
CLK
ILOUT
SW
VOUT
SXGPH File simplis_pop27_924.sxgph
Other SXGPH Files
clock#pop simplis_pop27_911.sxgph