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» DVM Test Report: Steady-State|Steady-State|Vin Nominal|80%

Test Details
Schematic 4.2_LTC3406B - DVM ADVANCED.sxsch
Test Steady-State|Steady-State|Vin Nominal|80%
Date / Time 12/10/2015 5:44 PM
Report Directory run_blt_in_and_prmt_grphs\Steady-State\Steady-State\VinNominal\80%
Log File report.txt
Screenshot schematic.png
Status PASS
Simulator simplis
Deck input.deck
Init input.deck.init
Measured Scalar Values
Efficiency 71.0081%
Efficiency_nom 71.0081%
Frequency(CLK) 955.639k
ILOAD
AVG
1.20047
MIN
1.19729
MAX
1.20334
RMS
1.20048
PK2PK
6.05004m
ISRC
AVG
509.204m
MIN
423.598u
MAX
1.49253
RMS
791.436m
PK2PK
1.49211
Power(LOAD) 1.80744
Power(SRC) 2.54539
VLOAD
AVG
1.5056
MIN
1.5016
MAX
1.50919
RMS
1.5056
PK2PK
7.58775m
VSRC
AVG
4.99949
MIN
4.99851
MAX
5
RMS
4.99949
PK2PK
1.49211m
Measured Spec Values
Max_VLOAD PASS: Max. Output1 Voltage (1.50919) is less than or equal to Max. Output1 Voltage Spec (1.58025)
Min_VLOAD PASS: Min. Output1 Voltage (1.5016) is greater than or equal to Min. Output1 Voltage Spec (1.42975)
LOAD
VLOAD
ILOAD
SXGPH File simplis_pop9_299.sxgph
SRC
ISRC
VSRC
SXGPH File simplis_pop9_289.sxgph
default
CLK
ILOUT
SW
VOUT
SXGPH File simplis_pop9_294.sxgph
Other SXGPH Files
clock#pop simplis_pop9_281.sxgph