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» DVM Test Report: Steady-State|Steady-State|Vin Nominal|90%

Test Details
Schematic 4.2_LTC3406B - DVM ADVANCED.sxsch
Test Steady-State|Steady-State|Vin Nominal|90%
Date / Time 12/10/2015 5:44 PM
Report Directory run_blt_in_and_prmt_grphs\Steady-State\Steady-State\VinNominal\90%
Log File report.txt
Screenshot schematic.png
Status PASS
Simulator simplis
Deck input.deck
Init input.deck.init
Measured Scalar Values
Efficiency 68.6252%
Efficiency_nom 68.6252%
Frequency(CLK) 955.635k
ILOAD
AVG
1.35053
MIN
1.34695
MAX
1.35382
RMS
1.35054
PK2PK
6.8659m
ISRC
AVG
592.759m
MIN
423.653u
MAX
1.64479
RMS
903.747m
PK2PK
1.64437
Power(LOAD) 2.03335
Power(SRC) 2.96298
VLOAD
AVG
1.50558
MIN
1.5016
MAX
1.50925
RMS
1.50559
PK2PK
7.65415m
VSRC
AVG
4.99941
MIN
4.99836
MAX
5
RMS
4.99941
PK2PK
1.64437m
Measured Spec Values
Max_VLOAD PASS: Max. Output1 Voltage (1.50925) is less than or equal to Max. Output1 Voltage Spec (1.58025)
Min_VLOAD PASS: Min. Output1 Voltage (1.5016) is greater than or equal to Min. Output1 Voltage Spec (1.42975)
LOAD
VLOAD
ILOAD
SXGPH File simplis_pop10_334.sxgph
SRC
VSRC
ISRC
SXGPH File simplis_pop10_324.sxgph
default
CLK
ILOUT
SW
VOUT
SXGPH File simplis_pop10_329.sxgph
Other SXGPH Files
clock#pop simplis_pop10_316.sxgph