Test Details | |
Schematic | LTC3406B - DVM ADVANCED.sxsch |
Test | Ac Analysis|Bode Plot|Vin Maximum|100% Load |
Date / Time | 12/10/2015 5:41 PM |
Report Directory | dc_dc_built_in\AcAnalysis\Bode Plot\Vin Maximum\100% Load |
Log File | report.txt |
Screenshot | schematic.png |
Status | PASS |
Simulator | simplis |
Deck | input.deck |
Init | input.deck.init |
Measured Scalar Values | |
Efficiency | 66.3459% |
gain_crossover_freq | 21.6616k |
gain_margin | 26.8904 |
ILOAD1 | AVG 1.50063 MIN 1.49625 MAX 1.50451 RMS 1.50063 PK2PK 8.25515m |
ISRC1 | AVG 619.346m MIN 466.026u MAX 1.81961 RMS 973.383m PK2PK 1.81914 |
min_phase | 56.1713 |
min_phase_freq | 21.6616k |
phase_crossover_freq | 417.534k |
phase_margin | 56.0928 |
Power(LOAD1) | 2.25938 |
Power(SRC1) | 3.40545 |
sw_freq | 955.632k |
VLOAD1 | AVG 1.50562 MIN 1.50123 MAX 1.50951 RMS 1.50562 PK2PK 8.28261m |
VSRC1 | AVG 5.49938 MIN 5.49818 MAX 5.5 RMS 5.49938 PK2PK 1.81914m |
Measured Spec Values | |
Max_VLOAD1 | PASS: Max. Output1 Voltage (1.50951) is less than or equal to Max. Output1 Voltage Spec (1.58025) |
Min_VLOAD1 | PASS: Min. Output1 Voltage (1.50123) is greater than or equal to Min. Output1 Voltage Spec (1.42975) |
min_gain_margin | PASS: Gain Margin (26.8904) is greater than Min. Gain Margin (12) |
min_phase_margin | PASS: Phase Margin (56.0928) is greater than Min. Phase Margin (35) |
Bode Plot
GAIN
PHASE
|
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SXGPH File | simplis_ac9_381.sxgph |
LOAD1
VLOAD1
ILOAD1
|
|
SXGPH File | simplis_pop9_367.sxgph |
SRC1
VSRC1
ISRC1
|
|
SXGPH File | simplis_pop9_362.sxgph |
default
FREQUENCY
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SXGPH File | simplis_pop9_345.sxgph |
Other SXGPH Files | |
clock#pop | simplis_pop9_350.sxgph |