Test Details | |
Schematic | 6.3_LTC3406B - DVM ADVANCED.sxsch |
Test | VOUT=0.6V w NoCurves NoScalars NoSpecs|Bode Plot|Vin Maximum|100% Load |
Date / Time | 12/10/2015 5:52 PM |
Report Directory | suppress_spec_gen\VOUT=0.6Vw NoCurves NoScalars NoSpecs\Bode Plot\Vin Maximum\100% Load |
Log File | report.txt |
Screenshot | schematic.png |
Status | PASS |
Simulator | simplis |
Deck | input.deck |
Init | input.deck.init |
Measured Scalar Values | |
Efficiency | 65.2962% |
Frequency(CLK) | 955.688k |
gain_crossover_freq | 18.3383k |
gain_margin | 33.7095 |
min_phase | 54.3004 |
min_phase_freq | 18.3383k |
phase_crossover_freq | 346.054k |
phase_margin | 54.2129 |
Power(LOAD) | 365.354m |
Power(SRC) | 559.533m |
VLOAD | AVG 605.449m MIN 602.632m MAX 607.24m RMS 605.451m PK2PK 4.608m |
Measured Spec Values | |
min_gain_margin | PASS: Gain Margin (33.7095) is greater than Min. Gain Margin (12) |
min_phase_margin | PASS: Phase Margin (54.2129) is greater than Min. Phase Margin (35) |
Bode Plot
GAIN
PHASE
|
|
SXGPH File | simplis_ac7_358.sxgph |
LOAD
VLOAD
|
|
SXGPH File | simplis_pop9_341.sxgph |
SRC
VSRC
ISRC
|
|
SXGPH File | simplis_pop9_331.sxgph |
default
CLK
ILOUT
SW
VOUT
|
|
SXGPH File | simplis_pop9_336.sxgph |
Other SXGPH Files | |
clock#pop | simplis_pop9_323.sxgph |