| Test Details | |
| Schematic | 8.2_LLC Closed Loop.sxsch | 
| Test | Efficiency and Loop Characterization|Vin Minimum|80% Load | 
| Date / Time | 12/10/2015 6:16 PM | 
| Report Directory | measure_loop_param\Efficiencyand Loop Characterization\Vin Minimum\80% Load | 
| Log File | report.txt | 
| Screenshot | schematic.png | 
| Status | PASS | 
| Simulator | simplis | 
| Deck | input.deck | 
| Init | input.deck.init | 
| Measured Scalar Values | |
| Efficiency | 95.3428% | 
| eta_min | 95.3428% | 
| Frequency(CLK) | 78.6638k | 
| gain_crossover_freq | 4.54921k | 
| gain_margin | 18.2986 | 
| gmargin_min | 18.2986 | 
| gxover_min | 4.54921k | 
| ILOAD | AVG 4.01071 MIN 4.00401 MAX 4.01561 RMS 4.01072 PK2PK 11.5989m  | 
				
| iload_min | 4.01071 | 
| ISRC | AVG 281.236m MIN -554.66m MAX 1.04289 RMS 513.736m PK2PK 1.59756  | 
				
| min_phase | 50.5666 | 
| min_phase_freq | 4.54921k | 
| phase_crossover_freq | 15.9072k | 
| phase_margin | 50.3544 | 
| pmargin_min | 50.3544 | 
| Power(LOAD) | 96.5045 | 
| Power(SRC) | 101.218 | 
| sw_freq_min | 78.6638k | 
| VLOAD | AVG 24.0617 MIN 24.0216 MAX 24.0909 RMS 24.0617 PK2PK 69.3643m  | 
				
| VSRC | AVG 359.972 MIN 359.896 MAX 360.055 RMS 359.972 PK2PK 159.756m  | 
				
| Measured Spec Values | |
| Max_VLOAD | PASS: Max. Output1 Voltage (24.0909) is less than or equal to Max. Output1 Voltage Spec (25.2) | 
| Min_VLOAD | PASS: Min. Output1 Voltage (24.0216) is greater than or equal to Min. Output1 Voltage Spec (22.8) | 
| min_gain_margin | PASS: Gain Margin (18.2986) is greater than Min. Gain Margin (12) | 
| min_phase_margin | PASS: Phase Margin (50.3544) is greater than Min. Phase Margin (35) | 
						![]() Bode Plot 
								GAIN 
								PHASE 
							 | 
				|
| SXGPH File | simplis_ac40_2394.sxgph | 
						![]() LOAD 
								VLOAD 
								ILOAD 
							 | 
				|
| SXGPH File | simplis_pop40_2360.sxgph | 
						![]() SRC 
								VSRC 
								ISRC 
							 | 
				|
| SXGPH File | simplis_pop40_2350.sxgph | 
						![]() Primary 
								IDQ1 
								IDQ2 
								Im 
								Ip 
								Ir 
								VSW 
							 | 
				|
| SXGPH File | simplis_pop40_2341.sxgph | 
						![]() Secondary 
								CLK 
								ICout 
								Is1 
								Is2 
								Vs 
							 | 
				|
| SXGPH File | simplis_pop40_2355.sxgph | 
| Other SXGPH Files | |
| default#2383#pop | simplis_pop40_2383.sxgph | 
| Modulator#pop | simplis_pop40_2388.sxgph |