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Zxxxx drain gate source modelname [area] [OFF] [IC=vds, vgs] |
drain | Drain node |
gate | Gate node |
source | Source node |
modelname | Name of model defined in a .model statement. Must begin with a letter but can contain any character except whitespace and period '.' . |
area | Area multiplying factor. Area scales up the device. E.g. an area of 3 would make the device behave like 3 transistors in parallel. Default is one. |
OFF | Instructs simulator to calculate operating point analysis with device initially off. This is used in latching circuits such as thyristors and bistables to induce a particular state. See .OP for more details. |
vds,vgs | Initial conditions for drain-source and gate-source junctions respectively. These only have an effect if the UIC parameter is specified on the .TRAN statement. |
.model modelname NMF ( parameters ) |
The symbols '$\times$' and '$\div$' in the Area column means that parameter should be multiplied or divided by the area factor respectively.
Name | Description | Units | Default | Area |
---|---|---|---|---|
VTO | Pinch-off Voltage | V | -2.0 | |
BETA | Transconductance parameter | A/V$^2$ | 2.5e-3 | $\times$ |
B | Doping tail extending parameter | 1/V | 0.3 | |
ALPHA | Saturation voltage parameter | 1/V | 2 | |
LAMBDA | Channel length modulation parameter | 1/V | 0 | |
RD | Drain ohmic resistance | $\Omega$ | 0 | $\div$ |
RS | Source ohmic resistance | $\Omega$ | 0 | $\div$ |
CGS | Zero bias gate source capacitance | F | 0 | $\times$ |
CGD | Zero bias gate drain capacitance | F | 0 | $\times$ |
PB | Gate junction potential | V | 1 | |
IS | Gate p-n saturation current | A | 1e-14 | $\times$ |
FC | Forward bias depletion capacitance coefficient | 0.5 | ||
KF | Flicker noise coefficient | 0 | ||
AF | Flicker noise exponent | 1 | ||
Notes | The GaAsFET model is derived from the model developed by Statz. The DC characteristics are defined by parameters VTO, B and BETA, which determine the variation of drain current with gate voltage, ALPHA, which determines saturation voltage, and LAMBDA, which determines the output conductance. IS determines the gate-source and gate-drain dc characteristics. |
Two ohmic resistances are included. Charge storage is modelled by total gate charge as a function of gate-drain and gate-source voltages and is defined by the parameters CGS, CGD and PB. |
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