DVM - Design Verification Module
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The Resistive Load subcircuit models a constant resistive load. This subcircuit is used by a number of built in test objectives. The resistance value can be set directly using the Res() function or can be automatically calculated from the output voltage using the IRes() function.
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The following table explains the parameters used in the Resistive Load.
Parameter Name | Default | Data Type | Range | Units | Parameter Description |
LOAD_NAME |
LOAD | String | n/a | n/a | Name of the DVM load. This name cannot contain spaces. |
LOAD_RESISTANCE |
2.00667 | Real | Min: 0 | Ω | Sets the load resistance of the load. |
To set any managed DVM load to a Resistive Load subcircuit, place a Res() or IRes() testplan entry in the Load column.
The Res() testplan entry sets the load resistance directly. The IRes() testplan entry calculates the load resistance from a given current and the nominal output voltage. The syntax for the two tesplan entries are explained in the table below.
Res(REF, LOAD_RESISTANCE)
IRes(REF, CURRENT)
Argument | Range | Description |
REF |
n/a |
The actual reference designator of the DVM load or the more generic syntax of OUTPUT:n where n is an integer indicating a position in the list of managed DVM loads. |
LOAD_RESISTANCE |
min: 0 |
The current for the load. This can be a numeric value or a symbolic value, such as percentage of full load. |
CURRENT |
min: 0 |
The DC Current for the load. The LOAD_RESISTANCE parameter is calculated from the nominal output voltage and the provided CURRENT. |
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