General | |
LTC3406B - DVM ADVANCED.sxsch |
dvm_advanced.testplan |
6.0_a_sampling_of_the_syncbuck_1in_1out.testplan |
2015-12-10 5:39 PM |
dc_dc_built_in |
dvm_advanced.log |
17 of 17 (17 of 17 Run, 10 Passed, 5 Failed, 1 Ran with Warnings, 0 Skipped) |
2m 51s |
|
Design Specifications | |
LTC3406B |
Synchronous Buck |
5.000 V (4.5 V to 5.5 V) |
1.505 V (±5%) @ 1.5 A |
955kHz |
|
Excel-compatible Results | |
dvm_advanced_table_scalars.txt |
dvm_advanced_table_specs.txt |
dvm_advanced_table_statistics.txt |
dvm_advanced_table_statspecs.txt |
|
Test 1 of 17 | |
Ac Analysis|Bode Plot|Vin Nominal|Light Load |
simplis |
AcAnalysis\Bode Plot\Vin Nominal\Light Load\report.txt.html |
FAIL |
10s |
|
Test 2 of 17 | |
Ac Analysis|Bode Plot|Vin Nominal|50% Load |
simplis |
AcAnalysis\Bode Plot\Vin Nominal\50% Load\report.txt.html |
PASS |
10s |
|
Test 3 of 17 | |
Ac Analysis|Bode Plot|Vin Nominal|100% Load |
simplis |
AcAnalysis\Bode Plot\Vin Nominal\100% Load\report.txt.html |
PASS |
10s |
|
Test 4 of 17 | |
Ac Analysis|Bode Plot|Vin Minimum|Light Load |
simplis |
AcAnalysis\Bode Plot\Vin Minimum\Light Load\report.txt.html |
FAIL |
10s |
|
Test 5 of 17 | |
Ac Analysis|Bode Plot|Vin Minimum|50% Load |
simplis |
AcAnalysis\Bode Plot\Vin Minimum\50% Load\report.txt.html |
PASS |
9s |
|
Test 6 of 17 | |
Ac Analysis|Bode Plot|Vin Minimum|100% Load |
simplis |
AcAnalysis\Bode Plot\Vin Minimum\100% Load\report.txt.html |
WARN |
10s |
|
Test 7 of 17 | |
Ac Analysis|Bode Plot|Vin Maximum|Light Load |
simplis |
AcAnalysis\Bode Plot\Vin Maximum\Light Load\report.txt.html |
FAIL |
9s |
|
Test 8 of 17 | |
Ac Analysis|Bode Plot|Vin Maximum|50% Load |
simplis |
AcAnalysis\Bode Plot\Vin Maximum\50% Load\report.txt.html |
PASS |
10s |
|
Test 9 of 17 | |
Ac Analysis|Bode Plot|Vin Maximum|100% Load |
simplis |
AcAnalysis\Bode Plot\Vin Maximum\100% Load\report.txt.html |
PASS |
10s |
|
Test 10 of 17 | |
Ac Analysis|Conducted Susceptibility|Vin Nominal|Light Load |
simplis |
AcAnalysis\Conducted Susceptibility\Vin Nominal\Light Load\report.txt.html |
PASS |
9s |
|
Test 11 of 17 | |
Ac Analysis|Input Impedance|Vin Minimum|50% Load |
simplis |
AcAnalysis\Input Impedance\Vin Minimum\50% Load\report.txt.html |
PASS |
10s |
|
Test 12 of 17 | |
Ac Analysis|Output Impedance|Vin Maximum|100% Load |
simplis |
AcAnalysis\Output Impedance\Vin Maximum\100% Load\report.txt.html |
PASS |
9s |
|
Test 13 of 17 | |
Transient|Step Load|Vin Nominal|50% Load to 100% Load |
simplis |
Transient\StepLoad\Vin Nominal\50% Load to 100% Load\report.txt.html |
FAIL |
8s |
|
Test 14 of 17 | |
Transient|Step Line|Light Load|Vin Minimum to Vin Maximum |
simplis |
Transient\StepLine\Light Load\Vin Minimum to Vin Maximum\report.txt.html |
PASS |
8s |
|
Test 15 of 17 | |
Transient|Startup|50% Load|0V to Vin Maximum |
simplis |
Transient\Startup\50%Load\0V to Vin Maximum\report.txt.html |
FAIL |
7s |
|
Test 16 of 17 | |
Transient|Short Circuit|Vin Minimum|Light Load to Short Circuit |
simplis |
Transient\ShortCircuit\Vin Minimum\Light Load to Short Circuit\report.txt.html |
RUN |
8s |
|
Test 17 of 17 | |
Steady-State|Steady-State|Vin Nominal|50% Load |
simplis |
Steady-State\Steady-State\VinNominal\50% Load\report.txt.html |
PASS |
8s |