The Verilog-HDL feature provides the ability to simulate Verilog digital designs included in analog circuits. The SIMetrix implementation uses an external Verilog simulator to achieve this and communicates with that simulator using the standard VPI programming interface.Two open-source Verilog simulators are supplied for this purpose and these are installed with the SIMetrix installer. In principle, any VPI compliant Verilog simulator may be used, however, only the two open source programs supplied are tested and supported.
Interfacing an analog simulator with a digital HDL simulator is a challenging task and imposes some trade-offs between timing precision and simulation speed. In particular, circuits where a digital section sits inside an analog feedback loop are especially demanding. As SIMetrix is an analog tool for analog designers, we have focussed on providing maximum accuracy. This imposes the need for rapid communication between the analog simulator and the Verilog simulator and for this we have developed our own inter-process communication method as the standard system supplied techniques were too slow.
| ◄ Optimiser Algorithms | Documentation ▶ |