DVM - Design Verification Module

FindACSteadyState() Test Objective

The sole purpose of the FindAcSteadyState() test is to capture and save the initial steady-state conditions in a .init file for use in other simulations.

This test objective measures the following scalar values:

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Testplan Syntax

The FindAcSteadyState() function has the following syntax with the arguments described in the table below:

FindAcSteadyState(REF, LINE_RANGE, VOLTAGE, FREQUENCY, ENABLED_FLAG)
FindAcSteadyState(REF, LINE_RANGE, VOLTAGE, FREQUENCY, ENABLED_FLAG, OPTIONAL_PARAMETER_STRING)  

Argument Range Description
REF n/a The actual reference designator of the DVM Source or the generic syntax of INPUT:n where n is an integer indicating a position in the list of managed DVM sources. 
LINE_RANGE LL or HL The line range to select the correct symbolic voltage value. This can only be the two strings LL or HL.
VOLTAGE min:0 The RMS voltage for the input source. The voltage can be a numeric value or a symbolic value, such as a percentage of nominal input voltage. Symbolic values use the LINE_RANGE parameter to find the correct symbolic value.
FREQUENCY min: > 0 The AC line frequency of the input source. This is used to both set the frequency of the input source and to set the simulation timing. The frequency can be a numeric or a symbolic value, such as F_High or F_Low.
ENABLED_FLAG Enabled or Disabled DVM uses a control source to turn on the converter during a ControlStartup() test objective. If this argument is set to Enabled, the control source is set to a DC source with the "on" voltage. Likewise, if this argument is set to Disabled, the source is set to the "off" voltage.
OPTIONAL_PARAMETER_STRING n/a Parameter string with a combination of one or more timing parameters:
  • NCYCLES_STOP*
  • NCYCLES_CAPTURE*

*    If more than one parameter is specified, join the parameter key-value pairs with a space, as shown in the example below. The order of the parameter names does not matter.

Simulation Timing

DVM sets the timing parameters for the FindAcSteadyState() test objective based on values that you enter on the Steady-State/Simulation Timing tab of the Full Power Assist DVM control symbol. The two simulation times are:

For the low symbolic frequency:

\[ \text{STOP_TIME} = \frac{\text{@ Low Freq (F_LOW)}}{\text{FREQUENCY}}\]

For the high symbolic frequency:

\[ \text{STOP_TIME} = \frac{\text{@ High Freq (F_HIGH)}}{\text{FREQUENCY}}\]

By default the simulation captures 2 full cycles of the line frequency:

\[ \text{DATA_START_TIME} = \text{STOP_TIME}-\frac{2}{\text{FREQUENCY}}\]

Source and Load Subcircuit Configuration

The FindAcSteadyState() test objective sets the source and load subcircuits to the following:

Source Control Source (if used) Load
AC Fixed Input Source DC Auxiliary Source Resistive Load

Loads other than the output under test are set to the Resistive Load. All other sources are set to either the DC Input Source for DC sources or the AC Fixed Input Source for the AC input sources.

Measured Scalar Values

The FindAcSteadyState() test objective measures the following scalar values where {load_name} is the name assigned to each load, and {source_name} is the name assigned to each source.

Scalar Name Description
Frequency({source_name}) A number which represents the line frequency.
V{load_name}%_diff_last_2_linecycles The percent change in the output voltage when averaged over the last two line cycles.
V{load_name} At Simulation Start Time The output voltage taken at time=0.
V{load_name} Last LineCycle The average value of the output voltage during the last line cycle in the simulation. Used for the V{load_name}%_diff_last_2_linecycles calculation.
V{load_name} Previous LineCycle The average value of the output voltage during the second to the last line cycle in the simulation. Used for the V{load_name}%_diff_last_2_linecycles calculation.
I{load_name} Minimum and Maximum values of the load current.
V{load_name} Minimum and Maximum values of the load voltage.
I{source_name} Minimum and Maximum values of the source current.
V{source_name} Minimum, Maximum, and RMS values of the source voltage.

Measured Specification Values

In the following table, {load_name} is the name assigned to each load. The default value is LOAD. DVM forces each load name to be unique so that the scalar and specification values for each load are unique.

Scalar Name PASS/FAIL Criteria
AC_Settling({load_name}) The percentage change in the output load voltage over the final two line frequency cycles is less than the maximum specification value.
Max_V{load_name} The maximum value of the output during the simulation time is less than the maximum specification value.

Testplan Example

The FindAcSteadyState() test objective is used in the built-in AC/DC testplans. Shown below is a single FindAcSteadyState() test from the AC/DC (1-input/1-output) testplan. This test configures the load to the 100% load symbolic value, and the input source to the HL Maximum symbolic value, and the line frequency to the F_Low symbolic value. The output load symbolic values are defined on the Output page, and the AC source symbolic parameters are defined on the AC Input page of the Full Power Assist DVM control symbol.

*?@ Analysis Objective Source Load Label GenerateInitFile IncludeInitFile
Transient FindAcSteadyState(INPUT:1, HL, Maximum, F_Low, Enabled)   LOAD(OUTPUT:1,100%) Transient|FindACSteadyState|HL_Maximum|F_Low|Enabled|100% Load INITFILE_HL_Maximum_F_Low_100% Load  

Optional Parameter String

The following FindAcSteadyState() test objective uses the OPTIONAL_PARAMETER_STRING argument to set the simulation stop time to 500ms (25 cycles@50Hz) and to capture 5 line cycles of simulation data.

FindAcSteadyState(INPUT:1, HL, Maximum, F_Low, Enabled, NCYCLES_STOP=25 NCYCLES_CAPTURE=5)

Test Report

You can view the complete test report in a new browser window here: FindAcSteadyState() Test Report. Below is an interactive link to the same test report.

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