This application topic addresses the fundamentals and best practices of Piecewise Linear modeling and loss measurement of key powerstage components in switching power supplies.
Beginning with switch stresses and losses, we examine the critical elements of MOSFET models and MOSFET driver models. We explain why these two devices need to be addressed simultaneously in order to achieve accurate simulation results. We illustrate methods for measuring total power switch losses as well as a straightforward method for measuring three components of the total switch loss, turnON, turnOFF and Conduction losses. We show why we believe that this is the most accurate method available for estimating switching losses in a switching power supply design prior to building the first prototype.
Modeling diode losses are addressed as a subset of the modeling challenges of MOSFETs. Capacitor losses can be measured in a straightforward manner as will be demonstrated in some of the examples below.
Loss models and measurement techniques for Magnetic components are not currently covered in this Application, but we anticipate adding this material in the future.
Measuring the total power stage losses of a switching power supply turns out to be a good bit more complicated that just summing up a number of individual component measurements. Particularly as power supplies get more and more efficient, they are also getting smaller and smaller. As a result, the thermal management consequences of errors in the prediction of power stage losses can be severe.
Accurate loss predictions require that the power supply be operating in steady state when the loss measurements are made. With complex switching power supplies, running a long transient simulation to reach steady state can be very costly in terms of simulation time. This can make it frustratingly difficult to achieve accurate and repeatable results. The SIMPLIS Periodic Operating Point (POP) analysis essentially removes this difficulty by driving the power supply system into an accurate, very repeatable steady state in much less simulation time than that required by a long transient.
All component loss measurements are calculated based on the simulated time domain waveforms appropriate for each power stage device. To obtain accurate switch loss measurements, it is essential that each critical voltage and current be represented by an adequate number of data points so as to capture each switching transition with sufficient resolution. Typically, this requires a large number of data points per switching cycle, which can greatly lengthen the simulation time needed to execute a long transient to reach steady state. In addition, a long transient with many data points per switching cycle requires a lot of hard drive space. Hard drive memory management can become a serious issue.
Again, the SIMPLIS Periodic Operating Point analysis provides an elegant solution to both of these problems. The POP analysis can drive the system into a much more accurate steady state condition in a much shorter time than that required for a long transient. Now the user can afford to request 50,000 data points per cycle and not significantly impact either the total simulation time or the amount of disk space needed to store the results. The reason for this is that after the POP analysis, the user need only output one cycle of steadystate operation with extremely high resolution (points per cycle) to make the desired loss calculations with the highest possible numerical accuracy.
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We begin by summarizing the structure of the Piecewise Linear SIMPLIS Level 2 MOSFET model. This is the recommended starting point for engineers who desire to accurately model switching stresses and losses in switching power supplies. We indicate where the accuracy of this model can be improved using the userdefined Level 3 MOSFET model by adding PWL segments to certain model elements at the expense of longer simulation times. We then point out the current limitations of these models. Unlike most Spice MOSFET models that have to be created by a subject matter expert, SIMPLIS MOSFET models can be directly generated by the user from either a Spice model, data sheet curves, or virtual data sheet curves generated by a Cadence simulation of a foundry model.
In order to model the switching transitions of a MOSFET, you must use either a SIMPLIS MOSFET model Level 2 or 3. Since model Level 3 is just a very flexible userdefined extension of model Level 2, our main focus here is to learn how to become proficient at using model Level 2. In most cases, the Level 2 model will yield excellent results. The model structure of the SIMPLIS Level 2 MOSFET model is shown below.
Level 2 models these circuit elements  Level 2 Schematic  

Each of the four supported MOSFET model levels are well documented here: SIMPLIS MOSFET Models
In the tabel below we compare the complexity of the four supported SIMPLIS MOSFET levels. The characteristics of the Level 2 model are highlighted in blue.
The MOSFET model Level 2 has been tuned over time to strike an attractive balance between simulation accuracy and simulation speed. All of the accuracy statements in this course have been achieved using model Level 2.
Unlike model Levels 0 and 1, in which all switching transitions occur instantaneously between an ONresistance and an OFFresistance, The Level 2 MOSFET model includes both the transconductance and the nonlinear capacitance. Model Level 2 models the transconductance of the active region of the MOSFET as the device transitions between ON and OFF. In addition, the model Level 2 captures the nonlinear behavior of the draintogate capacitance and the draintosource capacitance. These two nonlinearities, especially the draintogate capacitance, are critical in accurately modeling the switching transitions of a MOSFET in a switching power supply.
All levels employ an ON and OFF resistance. Level 2 models the forward transconductance gain of the active region as the MOSFET transitions from ON to OFF and from OFF to ON. The transconductance gain is modeled with two PWL segments in the drain current versus gatetosource voltage plane as shown below.
In most devices the gate capacitance is quite linear. The Level 2 model extraction process tests the gate capacitance of the Spice MOSFET model. If the gate capacitance is nearly linear, a linear capacitor is used in the Level 2 model. If the gate capacitance is nonlinear, then a PWL capacitor is used. The body diode is modeled as a three (default) or two segment PWL resistor. Both CDG and CDS are modeled as 4segment PWL capacitors.
At the user's discretion, the number of PWL segments may be increased using a Level 3 MOSFET model as shown in the last column of the table above.
There are two notable limitations of the automated model extraction process for the SIMPLIS Level 2 MOSFET model.
Despite these two model limitations, the results presented in our earlier discussion of in Module 1.0.4 Accuracy of PWL Models were all achieved with the MOSFET model extraction process available in version 8.2. Both of these limitations will be addressed in future versions of SIMetrix/SIMPLIS.
There are three main sources of information from which SIMPLIS MOSFET models are created.
As will be illustrated below, the primary limitation on the accuracy of the supported SIMPLIS Level 2 and 3 MOSFET models is the accuracy of the source information from which these models are created.
As mentioned in the introduction to this Application, when predicting MOSFET stresses and losses, it is as important to accurately model the MOSFET driver as to accurately model the MOSFET device itself. The nonlinear current limitations of the driver and the nonlinear behavior of the MOSFET contribute roughly equally to the shape of the MOSFET current and voltage waveforms during these switching transitions. This point is illustrated in the figure below.
During the turnON transient of a MOSFET under an inductive load, the MOSFET current is essentially constant during the entire voltage transition from OFF to ON. Consequently, the gate voltage vGS is also nearly constant during the voltage transition of vDS. During this transition, the gate current iG = CDG dvDG/dt ~ CDG dvDS/dt. Since the driver current iDriver = iG, we can conclude that during the switching transitions, iDriver ~ CDG dvDS/dt. As we have pointed out previously, the draintogate capacitance CDG is highly nonlinear. So also is the driver current. However, if we can characterize both of these nonlinearities, we can predict with very high accuracy the shape of vDS during these switching transitions.
The same dynamic as what we just described for the turn ON transition controls the MOSFET turn OFF transition. By characterizing the nonlinear CDG and source and sink current limitations of the driver, we can accurately predict the voltage transition of vDS.
Even when we just seek to compare the behavior of Spice and SIMPLIS MOSFET models we must be extremely careful to have exactly the same test bench in both simulators. Begin by opening the testbench schematic for comparing a Spice MOSFET model with the same device modeled in SIMPLIS, apps_b_1_FDD8882_testbench.sxsch, which is shown below.
We first note that the Custom Ideal Diode D1 and the Current Limiter in the drive circuit are very carefully crafted to behave identically in both the SIMetrix Spice and SIMPLIS simulators. You may descend into this hierarchical schematic and discover how this was achieved and then verify that the behavior of U1 and D1 are indeed identical in both simulators. The Custom Ideal Diode D1 is modeled as a 2 segment PWL resistor with 100Meg Ohm OFFresistance and 1m Ohm ONresistance. The Current Limiter U1 in the gate drive circuit is modeled as a current limited voltage source with a 2 A current limit both when sourcing or sinking current.
The Spice model we use for comparison is the FDD8882 downloaded from the ON Semiconductor website. We then extracted a SIMPLIS Level 2 MOSFET model from this Spice model.
With the exception of one enhancement which we will discuss shortly, the simulation results presented here are exactly those that result from the downloaded FDD8882 Spice model and the extracted Level 2 SIMPLIS model.
In the next Exercise, we look at a method to measure the switching losses in our testbench circuit.
In this exercise we look at two methods for measuring the losses in a switching MOSFET. The first method is simply to put a Power Probe on the device. With the second method we measure the total energy dissipated during each portion of the switching cycle, including both turn ON and turn OFF losses.
A power probe measures the instantaneous power dissipated in the device. In a switching circuit, the average of the instantaneous power over an exact multiple of switching cycles will yield the correct power dissipation for that particular operating condition.
The other option when using a power probe is to employ the cursors in the waveform viewer to exactly prescribe an integral number of switching cycles and then take the average of the power dissipated in the device.
Because a major objective of our testbench is to have a single test circuit that will run with both the SIMetrix Spice and SIMPLIS simulators, we are constrained to only being able to run transient simulations. As a result, this testbench is set up to only run through one ON  OFF switching cycle. This is advantageous for comparing time domain current and voltage transient waveforms from both simulators, but it is not as effective for measuring dissipated power for periodic systems. As a result, we have chosen to measure the dissipated energy in QDUT during each portion of the single pulse test. We can then scale this result based on the anticipated switching frequency to arrive at a good estimate of average power dissipated.
Here we see in the top grid the total energy dissipated during the course of the switching cycle. The middle grid shows the break out of the energy dissipated during the turnON transient, the conduction period and the turnOFF transient. The last value of each curve is the result of the integral of the energy dissipated over its respective interval. The lower grid shows the instantaneous power dissipation of QDUT during this switching transient.
This approach is every effective in performing the comparison between the two MOSFET models. When you zoom into these waveforms you will be able to see the very slight differences between the Spice model and the SIMPLIS model. When taken over the entire switching transient, the differences between the Spice loss estimates and the SIMPLIS loss estimates are less than 0.5%. The difference in estimated conduction loss is ~ 1%. The differences in either turnON loss or turnOFF loss are less than 2%.
Using the Load Component Values function we will restore the lead inductors to the Spice model and add them to the SIMPLIS model.
As we have seen in the Exercises above, the SIMPLIS PWL MOSFET model is capable of modeling the detailed behavior of MOSFET switching transitions. The SIMPLIS PWL MOSFET model yields excellent agreement with Spice when
In the second scenario, we restore the lead inductors in the Spice model and add them to the SIMPLIS model. Again, outstanding agreement is observed. We conclude that the piecewise linear nature of the SIMPLIS simulator does not present fundamental or practical limitations in the accuracy with which we can predict MOSFET switching waveforms or losses.
As we explore further looking to predict switching losses in a closedloop switching power supply, the piecewise linear nature of SIMPLIS actually has the advantage of having rather simple behavioral models for MOSFET devices that do not require highlytrained subject matter experts to create. In fact a good SIMPLIS MOSFET model can be created by hand from data sheet information in less than 30 minutes with just a little practice. As long as the data used to create the SIMPLIS MOSFET model is accurate, we can expect accurate results.
Before we jump into predicting switching losses in a closedloop switching power supply, we need to first examine the critical aspects of the MOSFET driver that need to be modeled well in order to ensure accurate switching loss predictions.
As discussed earlier, the nonlinear current limitations of the MOSFET driver and combine with the nonlinear capacitance CDG of the power MOSFET to dominate the shape of the vDS voltage transition. The shape of this voltage transition has a first order impact on the switching losses of a switching power supply.
In this section, we describe two techniques to analyze the switching losses in a closedloop synchronous buck dctodc converter. We have already demonstrated that we can accurately model both the MOSFET power switches and the MOSFET drivers. Next we show two techniques to analyze switching losses in a complex MOSFET configuration within a closedloop system.
Put a Probe On It: The first technique is quite simply to put a power probe on each MOSFET of interest as shown in the schematic apps_b_2_buck_converter.sxsch. Each power probe displays a waveform showing the instantaneous power dissipation. Each power probe is set up to measure the average of the instantaneous power over the entire simulation.
In this case, we have set the schematic up for a Periodic Operating Point analysis displaying exactly one cycle of steadystate operation. Consequently, the average of our measurement is the same as the average MOSFET power dissipation at this operating condition.
In the rectangular box labeled MOSFET Loss Analysis we have four arbitrary probes that measure power dissipated in the MOSFET. The probe on the bottom, labeled Power(Total) measures the total instantaneous power dissipated in the MOSFET over the entire simulation interval. By taking advantage of the POP analysis where we can arrange to present an exact integral multiple number of switching periods, in this case exactly one switching period, we can then easily measure the average of the instantaneous power dissipated in each power switch.
We can further break down the switch losses into Turn ON, Conduction and Turn OFF losses.