MOSFET

Netlist Entry

Mxxxx drain gate source bulk modelname [L=length] [W=width]
+ [AD=drain_area] [AS=source_area]
+ [PD=drain_perimeter] [PS=source_perimeter]
+ [NRD=drain_squares] [NRS=source_squares]
+ [NRB=bulk_squares]
+ [OFF] [IC=vds,vgs,vbs] [TEMP=local_temp] [M=area]

NMOS Model Syntax

.model modelname NMOS ( level=level_number parameters )

PMOS Model Syntax

.model modelname PMOS ( level=level_number parameters )

MOS Levels 1, 2 and 3: Model Parameters

CJ Default

Gate Charge Model, Levels 1, 2 and 3

Two gate charge models are available for MOS Levels 1, 2 and 3 selectable by the .OPTIONS setting SPICEMOSCHARGEMODEL:

.OPTIONS SPICEMOSCHARGEMODEL=0|1

MOS level 1-3 models are predominantly used as part of many manufacturer-designed power MOS and IGBT subcircuit models. In most cases the choice of gate charge model is unimportant. However, for a few models, the results vary significantly with the choice of model used. Most models are designed for PSpice and so the safest choice is the Yang-Chatterjee charge model (.OPTIONS SPICEMOSCHARGEMODEL=1). However, SIMetrix version 8.0 and earlier do not support this model so for compatibility with earlier versions the Meyer capacitance model is the default.

The setting .OPTIONS SPICECOMPATIBILITY=2 automatically enables the Yang-Chatterjee charge model as the default.

Notes for levels 1, 2 and 3:

The three levels 1 to 3 are as follows:

The above models differ from all other SIMetrix (and SPICE) models in that they contain many geometry relative parameters. The geometry of the device (length, width etc.) is entered on a per component basis and various electrical characteristics are calculated from parameters which are scaled according to those dimensions. This is approach is very much geared towards integrated circuit simulation and is inconvenient for discrete devices. If you are modelling a particular device by hand we recommend you use the level 17 model which is designed for discrete vertical devices.

MOS Level 17: Model Parameters

Notes for level 17

In SIMetrix version 5.2 and earlier, this model used a level parameter value of 7 instead of the current 17. The number was changed so that a PSpice compatible BSIM3 model (level=7) could be offered. In order to retain backward compatibility, any level 7 model containing the parameters cgdmax, cgdmin, xg1cgd, xg2cgd or vtcgd will automatically be switched to level=17.

The level 17 MOSFET was developed to model discrete vertical MOS transistors rather than the integrated lateral devices that levels 1 to 3 are aimed at. Level 17 is based on level 1 but has the following important additions and changes:

Gate-drain capacitance equation:

\[ \begin{split} C_{gd} = \left(0.5 - \frac{1}{\pi}\tan^{-1}\left(\left(\text{VTCGD} - v\right) - \text{XG1CGD}\right)\right)\text{CGDMIN} \\ + \left(0.5 - \frac{1}{\pi}\tan^{-1}\left(\left(\text{VTCGD} - v\right)\text{XG2CGD}\right)\right)\text{CGDMAX} \end{split} \]

where ???MATH???v???MATH??? is the gate-drain voltage. This is an empirical formula devised to fit measured characteristics. Despite this it has been found to follow actual measured capacitance to remarkable accuracy.

To model gate-drain capacitance quickly and to acceptable accuracy set the five ???MATH???\text{C}_{\text{gd}}???MATH??? parameters as follows: