Controlled Digital Oscillator

In this topic:

Netlist entry

Axxxx cntl_in out model_name : parameters

Connection details

Name Description Flow Type Allowed types
cntl_in Control input in v v, vd, i, id
out Output out d d

Instance Parameters

Name Description Type
init_phase Initial phase real

Model format

.MODEL model_name d_osc parameters

Model parameters

Name Description Type Default Limits Vector bounds
cntl_array Control array real vector N/A none ???MATH???2 - \infty???MATH???
freq_array Frequency array real vector N/A ???MATH???0 - \infty???MATH??? ???MATH???2 - \infty???MATH???
duty_cycle Output duty cycle real 0.5 1???MATH???\mu???MATH??? -0.999999 n/a
init_phase Initial phase of output real 0 -180 - +360 n/a
rise_delay Rise delay real 1n ???MATH???0 - \infty???MATH??? n/a
fall_delay Fall delay real 1n ???MATH???0 - \infty???MATH??? n/a
phase_tol Phase tolerance/degrees real 10 0 - 45 n/a
out_family Output logic family string UNIV none n/a
out_res Digital output resistance real 100 ???MATH???0 - \infty???MATH??? n/a
out_res_pos Digital output res. pos. slope real out_res ???MATH???0 - \infty???MATH??? n/a
out_res_neg Digital output res. neg. slope real out_res ???MATH???0 - \infty???MATH??? n/a

Device Operation

This device produces an output frequency controlled by an analog input signal following an arbitrary piece-wise linear law. The input to output frequency characteristic is defined by two parameters CNTL_ARRAY and FREQ_ARRAY. The following is an example of a .MODEL statement: 

.model vco d_osc
+ cntl_array=[-1,0,1,2,3,4,5]
+ freq_array=[0,10000,40000,90000,160000,250000,360000]

The frequency characteristic described by the above example follows a square law. The two arrays CNTL_ARRAY and FREQ_ARRAY must be the same length. These define the frequency output for a given analog input.

Time Step Control

In order to control the accuracy of the phase of the output signal, this model may cut back the analog time step. At each analog time point, the required frequency is calculated and the digital output is set at that frequency. If the analog input changes by too large an amount between time points, the digital output phase could be substantially in error as the frequency is constant between analog time points. The actual error is calculated and if this exceeds PHASE_TOL, the time point is rejected and a time point at which the error will be in tolerance is estimated.

Note: This model was included with the original XSPICE code but the SIMetrix version has been completely re-written. The original did not have any phase error control and could not give accurate results unless the analog time step was artificially kept small.

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