In this example we define a simple resistor. A resistor is a device whose current is proportional to the voltage difference between its terminals. This is defined in Verilog-A using a branch contribution as follows:
I(p,n) <+ V(p,n)/resistance ;
This defines the current/voltage relationship that the simulator must maintain on the nodes p and n. I(p,n) represents the current flowing from port p to port n and V(p,n) represents the potential difference measured between nodes p and n.
Here is the full definition:
'include "disciplines.vams" module va_resistor(p,n) ; parameter real resistance = 1000.0 from (0.0:inf] ; electrical p, n ; analog I(p,n) <+ V(p,n)/resistance ; endmodule
In the above the resistance parameter has been given value range limits to prevent resistance value of zero or below. A resistance of zero would lead to a divide-by-zero error.
Instead of blocking resistors with a value of zero, we could instead implement a zero resistance using a zero voltage contribution. This is how:
'include "disciplines.vams" module va_resistor(p,n) ; parameter real resistance = 1000.0 ; electrical p, n ; analog begin if (resistance!=0.0) I(p,n) <+ V(p,n)/resistance ; else V(p,n) <+ 0.0 ; end endmodule
Note the conditional statement starting if (resistance!=0.0). Notice also, that the analog block is now enclosed with the keywords begin and end. These are not actually necessary in this case, but are necessary where there is more than one statement in the analog block.
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